PDF CAV25160 Data sheet ( Hoja de datos )

Número de pieza	CAV25160
Descripción	(CAV25080 / CAV25160) SPI Serial CMOS EEPROM
Fabricantes	ON Semiconductor
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No Preview Available ! CAV25080, CAV25160 8-Kb and 16-Kb SPI Serial CMOS EEPROM Description The CAV25080/25160 are 8−Kb/16−Kb Serial CMOS EEPROM devices internally organized as 1024x8/2048x8 bits. They feature a 32−byte page write buffer and support the Serial Peripheral Interface (SPI) protocol. The device is enabled through a Chip Select (CS) input. In addition, the required bus signals are a clock input (SCK), data input (SI) and data output (SO) lines. The HOLD input may be used to pause any serial communication with the CAV25080/25160 device. These devices feature software and hardware write protection, including partial as well as full array protection. Features • Automotive Temperature Grade 1 (−40°C to +125°C) • 10 MHz SPI Compatible • 2.5 V to 5.5 V Supply Voltage Range • SPI Modes (0,0) & (1,1) • 32−byte Page Write Buffer • Self−timed Write Cycle • Hardware and Software Protection • Block Write Protection − Protect 1/4, 1/2 or Entire EEPROM Array • Low Power CMOS Technology • 1,000,000 Program/Erase Cycles • 100 Year Data Retention • Industrial and Extended Temperature Range • 8−lead SOIC and TSSOP Packages • These Devices are Pb−Free, Halogen Free/BFR Free, and RoHS Compliant VCC SI CS WP HOLD SCK CAV25080 CAV25160 SO VSS Figure 1. Functional Symbol http://onsemi.com SOIC−8 V SUFFIX CASE 751BD TSSOP−8 Y SUFFIX CASE 948AL PIN CONFIGURATION CS 1 SO VCC HOLD WP SCK VSS SI SOIC (V), TSSOP (Y) Pin Name CS SO WP VSS SI SCK HOLD VCC PIN FUNCTION Function Chip Select Serial Data Output Write Protect Ground Serial Data Input Serial Clock Hold Transmission Input Power Supply ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 13 of this data sheet. © Semiconductor Components Industries, LLC, 2011 November, 2011 − Rev. 0 1 Publication Order Number: CAV25080/D Free Datasheet http://www.datasheet4u.com/ 1 page CAV25080, CAV25160 Table 8. STATUS REGISTER 76 WPEN 0 5 0 43 0 BP1 Table 9. BLOCK PROTECTION BITS Status Register Bits BP1 BP0 00 01 10 11 None Array Address Protected 25080: 0300−03FF 25160: 0600−07FF 25080: 0200−03FF 25160: 0400−07FF 25080: 0000−03FF 25160: 0000−07FF Table 10. WRITE PROTECT CONDITIONS WPEN WP 0X 0X 1 Low 1 Low X High X High WEL 0 1 0 1 0 1 Protected Blocks Protected Protected Protected Protected Protected Protected 2 10 BP0 WEL RDY Protection No Protection Quarter Array Protection Half Array Protection Full Array Protection Unprotected Blocks Protected Writable Protected Writable Protected Writable Status Register Protected Writable Protected Protected Protected Writable http://onsemi.com 5 Free Datasheet http://www.datasheet4u.com/ 5 Page PIN # 1 IDENTIFICATION TOP VIEW CAV25080, CAV25160 PACKAGE DIMENSIONS SOIC 8, 150 mils CASE 751BD−01 ISSUE O E1 E SYMBOL A A1 b c D E E1 e h L θ MIN 1.35 0.10 0.33 0.19 4.80 5.80 3.80 0.25 0.40 0º NOM 1.27 BSC MAX 1.75 0.25 0.51 0.25 5.00 6.20 4.00 0.50 1.27 8º D A1 A eb SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. h θ L END VIEW c http://onsemi.com 11 Free Datasheet http://www.datasheet4u.com/ 11 Page

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