PDF IC61SF12832 Data sheet ( Hoja de datos )

Número de pieza	IC61SF12832
Descripción	(IC61SF12832 / IC61SF12836) 128K x 32 Flow Through SyncBurst SRAM
Fabricantes	Integrated Circuit Solution
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No Preview Available ! IC61SF12832 IC61SF12836 Document Title 128K x 32 Flow Through SyncBurst SRAM Revision History Revision No 0A History Initial Draft Draft Date Remark September 17,2001 The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices. Integrated Circuit Solution Inc. SSR018-0A 09/17/2001 1 Free Datasheet http://www.datasheet4u.com/ 1 page IC61SF12832 IC61SF12836 PIN CONFIGURATION 119-pin PBGA (Top View) 1234567 A VCCQ A6 A4 ADSP A8 A16 VCCQ B NC CE2 A3 ADSC A9 CE2 NC C NC A7 A2 VCC A12 A15 NC D DQc1 DQPc GND NC GND DQPb DQb8 E DQc2 DQc3 GND CE GND DQb6 DQb7 F VCCQ DQc4 GND OE GND DQb5 VCCQ G DQc5 DQc6 BW3 ADV BW2 DQb4 DQb3 H DQc7 DQc8 GND GW GND DQb2 DQb1 J VCCQ VCC NC VCC NC VCC VCCQ K DQd1 DQd2 GND CLK GND DQa7 DQa8 L DQd4 DQd3 BW4 NC BW1 DQa5 DQa6 M VCCQ DQd5 GND BWE GND DQa4 VCCQ N DQd6 DQd7 GND A1 GND DQa3 DQa2 P DQd8 DQPd GND A0 GND DQPa DQa1 R NC A5 MODE VCC GND A13 NC T NC NC A10 A11 A14 NC ZZ U VCCQ NC NC NC NC NC VCCQ 100-Pin LQFP DQPc DQc1 DQc2 VCCQ GND DQc3 DQc4 DQc5 DQc6 GND VCCQ DQc7 DQc8 GNDQ VCC NC GND DQd1 DQd2 VCCQ GND DQd3 DQd4 DQd5 DQd6 GND VCCQ DQd7 DQd8 DQPd 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 1 80 2 79 3 78 4 77 5 76 6 75 7 74 8 73 9 72 10 71 11 70 12 69 13 68 14 67 15 66 16 65 17 64 18 63 19 62 20 61 21 60 22 59 23 58 24 57 25 56 26 55 27 54 28 53 29 52 30 51 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 DQPb DQb8 DQb7 VCCQ GND DQb6 DQb5 DQb4 DQb3 GND VCCQ DQb2 DQb1 GND NC VCC ZZ DQa8 DQa7 VCCQ GND DQa6 DQa5 DQa4 DQa3 GND VCC DQa2 DQa1 DQPa 128K x 36 PIN DESCRIPTIONS A0, A1 A2-A16 CLK ADSP ADSC ADV BW1-BW4 BWE Synchronous Address Inputs. These pins must tied to the two LSBs of the address bus. Synchronous Address Inputs Synchronous Clock Synchronous Processor Address Status Synchronous Controller Address Status Synchronous Burst Address Advance Synchronous Byte Write Enable Synchronous Byte Write Enable GW CE, CE2, CE2 OE Synchronous Global Write Enable Synchronous Chip Enable Output Enable DQa-DQd Synchronous Data Input/Output MODE Burst Sequence Mode Selection VCC +3.3V Power Supply GND Ground VCCQ Isolated Output Buffer Supply: +3.3V ZZ Snooze Enable DQPa-DQPd Parity Data I/O Integrated Circuit Solution Inc. SSR018-0A 09/17/2001 5 Free Datasheet http://www.datasheet4u.com/ 5 Page IC61SF12832 IC61SF12836 READ/WRITE CYCLE TIMING CLK ADSP ADSC tKC tKH tSS tSH tKL tSS tSH ADSP is blocked by CE inactive ADV A16-A0 GW BWE BW4-BW1 CE CE2 CE2 OE DATAOUT DATAIN tAS tAH RD1 tWS WR1 tWH RD2 tWS tWH tCES tCEH tWS tWH WR1 CE Masks ADSP tCES tCEH CE2 and CE2 only sampled with ADSP or ADSC tCES tCEH tOEQ tOEHZ tOELZ High-Z tKQLZ tKQ High-Z 1a Single Read tOEQX tKQX tKQHZ tDS 1a tDH Single Write 2a 2b 2c Burst Read RD3 Unselected with CE2 tKQX 2d tKQHZ Unselected Integrated Circuit Solution Inc. SSR018-0A 09/17/2001 11 Free Datasheet http://www.datasheet4u.com/ 11 Page

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Número de pieza	Descripción	Fabricantes
IC61SF12832	(IC61SF12832 / IC61SF12836) 128K x 32 Flow Through SyncBurst SRAM	Integrated Circuit Solution
IC61SF12836	(IC61SF12832 / IC61SF12836) 128K x 32 Flow Through SyncBurst SRAM	Integrated Circuit Solution

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