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PDF AD5425 Data sheet ( Hoja de datos )

Número de pieza AD5425
Descripción High Bandwidth Multiplying DAC
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Data Sheet
8-Bit, High Bandwidth
Multiplying DAC with Serial Interface
AD5425
FEATURES
GENERAL DESCRIPTION
2.5 V to 5.5 V supply operation
50 MHz serial interface
2.47 MSPS update rate
INL of ±0.25 LSB
10 MHz multiplying bandwidth
±10 V reference input
Low glitch energy: <2 nV-s
Extended temperature range: −40°C to +125°C
10-lead MSOP package
Guaranteed monotonic
4-quadrant multiplication
Power-on reset with brownout detection
LDAC function
The AD54251 is a CMOS, 8-bit, current output digital-to-analog
converter that operates from a 2.5 V to 5.5 V power supply,
making it suitable for battery-powered applications and many
other applications.
This DAC utilizes a double buffered, 3-wire serial interface that
is compatible with SPI®, QSPI, MICROWIRE, and most DSP
interface standards. An LDAC pin is also provided, which
allows simultaneous updates in a multi-DAC configuration. On
power-up, the internal shift register and latches are filled with
0s and the DAC outputs are 0 V.
As a result of manufacturing on a CMOS submicron process,
0.4 µA typical power consumption
this DAC offers excellent 4-quadrant multiplication charac-
teristics with large signal multiplying bandwidths of 10 MHz.
APPLICATIONS
Portable battery-powered applications
Waveform generators
Analog processing
Instrumentation applications
Programmable amplifiers and attenuators
The applied external reference input voltage (VREF) determines
the full-scale output current. An integrated feedback resistor,
RFB, provides temperature tracking and full-scale voltage output
when combined with an external I-to-V precision amplifier.
The AD5425 is available in a small, 10-lead MSOP package.
Digitally controlled calibration
Programmable filters and oscillators
Composite video
Ultrasound
Gain, offset, and voltage trimming
FUNCTIONAL BLOCK DIAGRAM
VDD
VREF
AD5425
8-BIT
R-2R DAC
R
RFB
IOUT1
IOUT2
LDAC
POWER-ON
RESET
DAC REGISTER
INPUT LATCH
SYNC
SCLK
SDIN
CONTROL LOGIC AND
INPUT SHIFT REGISTER
GND
Figure 1.
1 U.S. Patent No. 5,969,657.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2004–2012 Analog Devices, Inc. All rights reserved.
Free Datasheet http://www.datasheet4u.com/

1 page




AD5425 pdf
AD5425
Parameter
Min Typ Max Unit
Digital THD
50 kHz fOUT
20 kHz fOUT
Output Noise Spectral Density
70 dB
73 dB
25 nV√Hz
SFDR Performance (Wide Band)
50 kHz fOUT
20 kHz fOUT
SFDR Performance (Narrow Band)
67 dB
68 dB
50 kHz fOUT
20 kHz fOUT
Intermodulation Distortion
73 dB
75 dB
79 dB
POWER REQUIREMENTS
Power Supply Range
IDD
Power Supply Sensitivity
2.5
0.4
1 Guaranteed by design and characterization, not subject to production test.
5.5
0.6
5
0.001
V
µA
µA
%/%
Data Sheet
Conditions/Comments
Clock = 1 MHz, VREF = 3.5 V, CCOMP = 1.8 pF
@ 1 kHz
Clock = 2 MHz , VREF = 3.5 V
Clock = 2 MHz, VREF = 3.5 V
f1 = 20 kHz, f2 = 25 kHz, clock = 2 MHz,
VREF = 3.5 V
TA = 25°C, logic inputs = 0 V or VDD
Logic inputs = 0 V or VDD, T = −40°C to +125°C
ΔVDD = ±5%
Rev. C | Page 4 of 24
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AD5425 arduino
AD5425
0.7
TA = 25°C
0.6
0.5
VDD = 5V
0.4
0.3
0.2
0.1
0
0
VDD = 2.5V
VDD = 3V
1234
INPUT VOLTAGE (V)
Figure 16. Supply Current vs. Input Voltage
5
1.8
TA = 25°C
1.6
1.4
VIH
1.2
1.0
VIL
0.8
0.6
0.4
0.2
0
2.5 3.0 3.5 4.0 4.5 5.0 5.5
VOLTAGE (V)
Figure 17. Threshold Voltages vs. Supply Voltage
0.2
0
–0.2
–0.4
–0.6
TA = 25°C
VDD = 5V
VREF = ±3.5V
CCOMP = 1.8pF
AD8083 AMPLIFIER
–0.8
1 10 100
1k
10k 100k 1M 10M 100M
FREQUENCY (Hz)
Figure 18. Reference Multiplying Bandwidth—All 1s Loaded
Data Sheet
0.060
0.050
0.040
0.030
0.020
0.010
0
–0.010
–0.020
0
VDD 5V, 0V REF
NRG = 2.049nVs
07xFF TO 0x800
TA = 25°C
VREF = 0V
AD8038 AMPLIFIER
CCOMP = 1.8pF
VDD 3V, 0V REF
NRG = 0.088nVs
0x800 TO 0x7FF
VDD 3V, 0V REF
NRG = 1.877nVs
0x7FF TO 0x800
VDD 5V, 0V REF
NRG = 0.119nVs,
0x800 TO 0x7FF
50 100 150 200 250
TIME (ns)
Figure 19. Midscale Transition, VREF = 3.5 V
300
6
0
TA = 25°C
LOADING
–6 ZS TO FS
–12
–18
–24
–30
–36
–42
–48
–54
–60
–66
–72
–78
–84
–90
–96
–102
1
10
ALL ON
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
ALL OFF
TA = 25°C
VDD = 5V
VREF = ±3.5V
INPUT
CCOMP = 1.8pF
AD8083 AMPLIFIER
100 1k 10k 100k 1M 10M 100M
FREQUENCY (Hz)
Figure 20. Reference Multiplying Bandwidth vs. Frequency and Code
3
VREF = ±0.15V, AD8038 CC 1pF
VREF = ±2V, AD8038 CC 1pF
0
VREF = ±3.51V, AD8038 CC 1.8pF
VREF = ±2V, AD8038 CC 1.47pF
–3
VREF = ±0.15V, AD8038 CC 1.47pF
–6
TA = 25°C
VDD = 5V
–9 AD8038 AMPLIFIER
10k 100k
1M
FREQUENCY (Hz)
10M
100M
Figure 21. Reference Multiplying Bandwidth vs. Frequency and
Compensation Capacitor
Rev. C | Page 10 of 24
Free Datasheet http://www.datasheet4u.com/

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