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PDF UPD5753T7G Data sheet ( Hoja de datos )

Número de pieza UPD5753T7G
Descripción SiGe BiCMOS Integrated Circuit
Fabricantes Renesas　
Logotipo Renesas Logotipo



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PreliminaryData Sheet
μPD5753T7G
SiGe/CMOS Integrated Circuit
4 × 2 IF Switch Matrix with Tone/Voltage Controller
R09DS0014EJ0100
Rev.1.00
Feb 22, 2011
FEATURES
• 4 independent IF channels, integral switching to channel input to either channel output
• 4 × 2 switch matrix with integrated switch control - Tone/Voltage
- Switch’s Enable/Disable function is linked with POLA input voltage level
• Switch’s Enable condition : VPOLA > 9.5 V
• Frequency range
: f = 250 MHz to 2150 MHz
• High isolation
: ISLD/U = 33 dB TYP. @Worst mode
• Insertion loss
: LINS = 7 dB TYP. @ ZS = ZL = 50 Ω
• Insertion loss flatness
: ΔLINS = 1.0 dB TYP.
• 20-pin 4 × 4 mm square micro lead package ( 20-pin plastic QFN (0.5 mm pitch))
APPLICATIONS
• DBS IF switching
• Multiswitch, Switch box
• 4 × 2 switching application for microwave signal
ORDERING INFORMATION
Part Number
Order Number
Package
Marking
Supplying Form
μPD5753T7G-E1
μPD5753T7G-E1-A 20-pin plastic QFN
(0.5 mm pitch)
(Pb-Free)
D5753
• Embossed tape 12 mm wide
• Pin 6 to 10 face the perforation side of the tape
• Qty 5 kpcs/reel
• Dry packing specification (MSL 3 Equivalent)
Remark To order evaluation samples, please contact your nearby sales office.
Part number for sample order: μPD5753T7G
CAUTION
Observe precautions when handling because these devices are sensitive to electrostatic discharge.
R09DS0014EJ0100 Rev.1.00
Feb 22, 2011
Page 1 of 13
Free Datasheet http://www.datasheet4u.com/

1 page




UPD5753T7G pdf
μPD5753T7G
TRUTH TABLE
SWITCHING CONTROL OF OUT1 SIGNAL PATH
SWITCHING CONTROL OF OUT2 SIGNAL PATH
Logic Pattern
CONTROL PINS
OUT1
Logic Pattern
CONTROL PINS
Select
for OUT1
Select
for OUT2
M0 M1
POLA1
TONE1 Output Signal
M0 M1
POLA2
TONE2
No Voltage 22 kHz
None
No Voltage 22 kHz
No Voltage
0
None
No Voltage
0
00
Low 22 kHz
Low 0
IN-C
IN-D
00
Low 22 kHz
Low 0
High
0
IN-B
High
0
High
22 kHz
IN-A
High
22 kHz
No Voltage 22 kHz
None
No Voltage 22 kHz
No Voltage
0
None
No Voltage
0
11
Low 22 kHz
Low 0
IN-A
IN-B
11
Low 22 kHz
Low 0
High
0
IN-D
High
0
High
22 kHz
IN-C
High
22 kHz
No Voltage 22 kHz
None
No Voltage 22 kHz
No Voltage
0
None
No Voltage
0
01
Low 22 kHz
Low 0
IN-D
IN-C
01
Low 22 kHz
Low 0
High
0
IN-B
High
0
High
22 kHz
IN-A
High
22 kHz
No Voltage 22 kHz
None
No Voltage 22 kHz
No Voltage
0
None
No Voltage
0
10
Low 22 kHz
Low 0
IN-B
IN-A
10
Low 22 kHz
Low 0
High
0
IN-D
High
0
High
22 kHz
IN-C
High
22 kHz
Remarks M0, M1 : “0“ : 0 V dc (Connected to GND line)
“1“ : VDD dc (Connected to VDD line)
VDD = + 3.3 V dc
POLA1, 2 : “Low”
: 9.5 V to 14 V dc
“High”
: 15.5 V to 19 V dc
“No Voltage” : 0 V dc (< 5 V dc) or Open
Switch’s Enable/Disable function is linked with POLA input voltage level
Switch’s Enable condition : VPOLA > 9.5 V
OUT2
Output Signal
None
None
IN-C
IN-D
IN-B
IN-A
None
None
IN-A
IN-B
IN-D
IN-C
None
None
IN-D
IN-C
IN-B
IN-A
None
None
IN-B
IN-A
IN-D
IN-C
R09DS0014EJ0100 Rev.1.00
Feb 22, 2011
Page 5 of 13
Free Datasheet http://www.datasheet4u.com/

5 Page





UPD5753T7G arduino
μPD5753T7G
MOUNTING PAD LAYOUT DIMENSIONS
20-PIN 4 × 4 mm SQUARE MICRO LEAD PACKAGE (20-PIN PLASTIC QFN (0.5 mm pitch)) (UNIT:
mm)
2.15
1.65
1.35
2.15
1.65
1.35
20-0.2
Remark The mounting pad layout in this document is for reference only.
R09DS0014EJ0100 Rev.1.00
Feb 22, 2011
Page 11 of 13
Free Datasheet http://www.datasheet4u.com/

11 Page







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