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PDF MAX1214N Data sheet ( Hoja de datos )
| Número de pieza | MAX1214N | |
| Descripción | ADC | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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19-3866; Rev 0; 4/06
EVAALVUAAILTAIOBNLEKIT
1.8V, Low-Power, 12-Bit, 210Msps
ADC for Broadband Applications
General Description
The MAX1214N is a monolithic, 12-bit, 210Msps ana-
log-to-digital converter (ADC) optimized for outstanding
dynamic performance at high-IF frequencies beyond
300MHz. The product operates with conversion rates
up to 210Msps while consuming only 799mW.
At 210Msps and an input frequency up to 100MHz, the
MAX1214N achieves an 81.3dBc spurious-free dynam-
ic range (SFDR) with excellent 67dB signal-to-noise
ratio (SNR) that remains flat (within 2dB) for input tones
up to 250MHz. This makes it ideal for wideband appli-
cations such as communications receivers, cable-head
end receivers, and power-amplifier predistortion in cel-
lular base-station transceivers.
The MAX1214N operates from a single 1.8V power sup-
ply. The analog input is designed for AC-coupled differ-
ential or single-ended operation. The ADC also features
a selectable on-chip divide-by-2 clock circuit that
accepts clock frequencies as high as 420MHz. A low-
voltage differential signal (LVDS) sampling clock is rec-
ommended for best performance. The converter
provides LVDS-compatible digital outputs with data for-
mat selectable to be either two’s complement or offset
binary.
The MAX1214N is available in a 68-pin QFN package
with exposed paddle (EP) and is specified over the
industrial (-40°C to +85°C) temperature range.
See the Pin-Compatible Versions table for a complete
selection of 8-bit, 10-bit, and 12-bit high-speed ADCs in
this family.
Features
♦ 210Msps Conversion Rate
♦ Excellent Low-Noise Characteristics
SNR = 67dB at fIN = 100MHz
SNR = 65dB at fIN = 250MHz
♦ Excellent Dynamic Range
SFDR = 81.3dBc at fIN = 100MHz
SFDR = 84.9dBc at fIN = 250MHz
♦ Single 1.8V Supply
♦ 799mW Power Dissipation at fSAMPLE = 210Msps
and fIN = 100MHz
♦ On-Chip Track-and-Hold Amplifier
♦ Internal 1.24V-Bandgap Reference
♦ On-Chip Selectable Divide-by-2 Clock Input
♦ LVDS Digital Outputs with Data Clock Output
♦ MAX1214NEVKIT Available
Ordering Information
PART
TEMP RANGE
PIN-
PACKAGE
PKG
CODE
MAX1214NEGK-D -40°C to +85°C 68 QFN-EP* G6800-4
MAX1214NEGK+D -40°C to +85°C 68 QFN-EP* G6800-4
*EP = Exposed paddle.
+Denotes lead-free package.
D = Dry pack.
Applications
Base-Station Power-Amplifier Linearization
Cable-Head End Receivers
Wireless and Wired Broadband Communications
Communications Test Equipment
Radar and Satellite Subsystems
Pin Configuration appears at end of data sheet.
Pin-Compatible Versions
PART
RESOLUTION
(BITS)
MAX1121
MAX1122
MAX1123
MAX1124
MAX1213
MAX1214
MAX1215
MAX1213N
MAX1214N
MAX1215N
8
10
10
10
12
12
12
12
12
12
SPEED
GRADE
(Msps)
250
170
210
250
170
210
250
170
210
250
ON-CHIP
BUFFER
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Free Datasheet http://www.datasheet4u.com/
1 page  
1.8V, Low-Power, 12-Bit, 210Msps
ADC for Broadband Applications
Typical Operating Characteristics
(AVCC = OVCC = 1.8V, AGND = OGND = 0, fSAMPLE = 210MHz, AIN = -1dBFS; see each TOC for detailed information on test condi-
tions, differential input drive, differential sine-wave clock input drive, 0.1µF capacitor on REFIO, internal reference, digital output pins
differential RL = 100Ω, TA = +25°C.)
FFT PLOT
(8192-POINT DATA RECORD)
0
-10
fSAMPLE = 210MHz
fIN = 12.484MHz
-20 AIN = -0.97dBFS
-30
SNR = 67.3dB
SINAD = 67.2dB
-40 THD = -83.4dBc
-50 SFDR = 88.5dB
HD2 = -90.4dBc
-60 HD3 = -96.7dBc
-70
-80
2 34
5
-90
-100
-110
0 10 20 30 40 50 60 70 80 90 100
ANALOG INPUT FREQUENCY (MHz)
FFT PLOT
(8192-POINT DATA RECORD)
0
-10
fSAMPLE = 210MHz
fIN = 100.155MHz
-20 AIN = -0.954dBFS
-30 SNR = 67dB
SINAD = 66.6dB
-40 THD = -76.8dBc
-50 SFDR = 81.2dBc
-60
HD2 = -81.2dBc
HD3 = -81.8dBc
-70 2
4
-80
3
5
-90
-100
-110
0 10 20 30 40 50 60 70 80 90 100
ANALOG INPUT FREQUENCY (MHz)
FFT PLOT
(8192-POINT DATA RECORD)
0
-10
fSAMPLE = 210MHz
fIN = 199.771MHz
-20 AIN = -0.961dBFS
-30
SNR = 65.4dB
SINAD = 65.1dB
-40 THD = -78.5dBc
-50 SFDR = 82.8dBc
HD2 = -82.8dBc
-60 HD3 = -84.6dBc
-70 2 3
9
-80 4 5 6 7 8 10
-90
-100
-110
0 10 20 30 40 50 60 70 80 90 100
ANALOG INPUT FREQUENCY (MHz)
FFT PLOT
(8192-POINT DATA RECORD)
0
-10
-20
-30
-40
-50
-60
-70
-80 5
-90
fSAMPLE = 210MHz
fIN = 249.913MHz
AIN = -0.994dBFS
SNR = 65dB
SINAD = 64.9dB
THD = -79.3dBc
SFDR = 85dBc
HD2 = -85dBc
HD3 = -86dBc
2
4
3
-100
-110
0 10 20 30 40 50 60 70 80 90 100
ANALOG INPUT FREQUENCY (MHz)
TWO-TONE IMD PLOT
(8192-POINT DATA RECORD)
0
-10
fSAMPLE = 210MHz
fIN1 = 96.8737793MHz
-20 fIN2 = 100.1550293MHz
-30 IMD = -79dBc
fIN1
fIN2
-40
fIN2 + fIN1
-50 fIN2 - fIN1
2fIN2 + fIN1
-60 2fIN1 + fIN2
-70
2fIN2 - fIN1
-80
-90
-100
-110
0 10 20 30 40 50 60 70 80 90 100
ANALOG INPUT FREQUENCY (MHz)
SNR/SINAD vs. ANALOG INPUT FREQUENCY
(fSAMPLE = 210MHz, AIN = -1dBFS)
70
SNR
65
SINAD
60
55
50
45
0
50 100 150 200 250 300
fIN (MHz)
SFDR/(-THD) vs. ANALOG INPUT FREQUENCY
(fSAMPLE = 210MHz, AIN = -1dBFS)
100
95
90 SFDR
85
80
75
70 -THD
65
60
55
50
45
0
50 100 150 200 250 300
fIN (MHz)
HD2/HD3 vs. ANALOG INPUT FREQUENCY
(fSAMPLE = 210MHz, AIN = -1dBFS)
-50
-55
-60
-65
-70
-75 HD2
-80
-85
-90
-95 HD3
-100
-105
-110
0
50 100 150 200 250 300
fIN (MHz)
SNR/SINAD vs. ANALOG INPUT AMPLITUDE
(fSAMPLE = 210MHz, fIN = 65.087MHz)
70
60 SNR
50
40 SINAD
30
20
10
0
-55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0
ANALOG INPUT AMPLITUDE (dBFS)
_______________________________________________________________________________________ 5
Free Datasheet http://www.datasheet4u.com/
5 Page 
1.8V, Low-Power, 12-Bit, 210Msps
ADC for Broadband Applications
AVCC
INP
CP 900Ω
900Ω
INN
CP
CS IS THE SAMPLING CAPACITANCE.
CP IS THE PARASITIC CAPACITANCE ~ 1pF.
INP
VCM
INN
GND
INP - INN
GND
T/H
MAX1214N
CS
12-BIT PIPELINE
ADC
CS
FROM CLOCK-
MANAGEMENT BLOCK
TO COMMON MODE
VCM + VFS / 4
VCM - VFS / 4
+VFS / 2
Figure 2. Simplified Analog Input Architecture and Allowable Input Voltage Range
-VFS / 2
______________________________________________________________________________________ 11
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet MAX1214N.PDF ] | |
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