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Número de pieza | NCP4304A | |
Descripción | Secondary Side Synchronous Rectification Driver | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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No Preview Available ! NCP4304A, NCP4304B
Secondary Side
Synchronous Rectification
Driver for High Efficiency
SMPS Topologies
The NCP4304A/B is a full featured controller and driver tailored to
control synchronous rectification circuitry in switch mode power
supplies. Due to its versatility, it can be used in various topologies such
as flyback, forward and Half Bridge Resonant LLC.
The combination of externally adjustable minimum on and off times
helps to fight the ringing induced by the PCB layout and other
parasitic elements. Therefore, a reliable and noise less operation of the
SR system is insured.
The extremely low turn off delay time, high sink current capability
of the driver and automatic package parasitic inductance
compensation system allow to maximize synchronous rectification
MOSFET conduction time that enables further increase of SMPS
efficiency.
Finally, a wide operating VCC range combined with two versions of
driver voltage clamp eases implementation of the SR system in 24 V
output applications.
Features
• Self-Contained Control of Synchronous Rectifier in CCM, DCM, and
QR Flyback Applications
• Precise True Secondary Zero Current Detection with Adjustable
Threshold
• Automatic Parasitic Inductance Compensation Input
• Typically 40 ns Turn off Delay from Current Sense Input to Driver
• Zero Current Detection Pin Capability up to 200 V
• Optional Ultrafast Trigger Interface for Further Improved
Performance in Applications that Work in Deep CCM
• Disable Input to Enter Standby or Low Consumption Mode
• Adjustable Minimum On Time Independent of VCC Level
• Adjustable Minimum Off Time Independent of VCC Level
• 5 A/2.5 A Peak Current Sink/Source Drive Capability
• Operating Voltage Range up to 30 V
• Gate Drive Clamp of Either 12 V (NCP4304A) or 6 V (NCP4304B)
• Low Startup and Standby Current Consumption
• Maximum Frequency of Operation up to 500 kHz
• SOIC−8 Package
• These are Pb-Free Devices
Typical Applications
• Notebook Adapters
• High Power Density AC/DC Power Supplies
• Gaming Consoles
• All SMPS with High Efficiency Requirements
http://onsemi.com
8
1
SOIC−8
D SUFFIX
CASE 751
MARKING
DIAGRAM
8
4304x
ALYW G
G
1
DFN8
CASE 488AF
NCP
4304x
ALYWG
1G
4304x = Specific Device Code
x = A or B
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(*Note: Microdot may be in either location)
PINOUT INFORMATION
VCC
Min_Toff
Min_Ton
Trig/Disable
18
27
36
45
DRV
GND
COMP
CS
(NOTE: For DFN the exposed pad must be either
unconnected or preferably connected to ground.
The GND pin must be always connected to ground.)
ORDERING INFORMATION
Device
NCP4304ADR2G
NCP4304BDR2G
Package
SOIC−8
(Pb−Free)
SOIC−8
(Pb−Free)
Shipping†
2500 /
Tape & Reel
2500 /
Tape & Reel
NCP4304AMNTWG
DFN8
4000 /
(Pb−Free) Tape & Reel
NCP4304BMNTWG
DFN8
4000 /
(Pb−Free) Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2012
September, 2012 − Rev. 0
1
Publication Order Number:
NCP4304/D
Free Datasheet http://www.datasheet4u.com/
1 page NCP4304A, NCP4304B
ELECTRICAL CHARACTERISTICS (For typical values TJ = 25°C, for min/max values TJ = −40°C to +125°C, Max TJ = 150°C, VCC
= 12 V, Cload = 0 nF, R_min_ton = R_min_toff = 10 kW, Vtrig = 0 V, f_CS = 100 kHz, DC_CS = 50%, VCS_high = 4 V, VCS_low = −1 V unless
otherwise noted)
Symbol
Rating
Pin Min Typ Max Unit
DRIVE OUTPUT
tr_A
tr_B
tf_A
tf_B
Roh
Rol
IDRV_pk(source)
IDRV_pk(sink)
VDRV(min_A)
VDRV(min_B)
VDRV(CLMP_A)
VDRV(CLMP_B)
CS INPUT
Output voltage rise−time for A version (Cload = 10 nF)
Output voltage rise−time for B version (Cload = 10 nF)
Output voltage fall−time for A version (Cload = 10 nF)
Output voltage fall−time for B version (Cload = 10 nF)
Driver source resistance (Note 3)
Driver sink resistance
Output source peak current
Output sink peak current
Minimum drive output voltage for A version (VCC = VCCoff + 200 mV)
Minimum drive output voltage for B version (VCC = VCCoff + 200 mV)
Driver clamp voltage for A version (12 < VCC < 28, Cload = 1 nF)
Driver clamp voltage for B version (12 < VCC < 28, Cload = 1 nF)
8
8
8
8
8
8
8
8
8
8
8
8
− 120 −
ns
− 80 − ns
− 50 − ns
− 35 − ns
− 1.8 7
W
−1 2W
− 2.5 −
A
− 5 −A
8.3 − − V
4.5 − − V
10 12 14.3 V
568V
Tpd_on
The total propagation delay from CS input to DRV output turn on
(Vcs goes down from 4 V to −1 V, tf_CS = 5 ns, COMP pin connected
to GND)
5, 8
−
60 90
ns
Tpd_off
The total propagation delay from CS input to DRV output turn off
(Vcs goes up from −1 V to 4 V, tr_CS = 5 ns, COMP pin connected to
GND), (Note 3)
5, 8
−
40 55 ns
Ishift_CS
Current sense input current source (VCS = 0 V)
5 95 100 105 mA
Vth_cs_on
Current sense pin turn−on input threshold voltage
5, 8 −120 −85 −50 mV
Vth_cs_off
Current sense pin turn−off threshold voltage, COMP pin connected
to GND (Note 3)
5, 8
−1
−
0 mV
Gcomp
Compensation inverter gain
ICS_Leakage Current Sense input leakage current, VCS = 200 Vdc
TRIGGER/DISABLE INPUT
5,6,8
−1
−
5 − − 1 mA
ttrig_pw_min Minimum trigger pulse width (Note 3)
Vtrig Trigger input threshold voltage (Vtrig goes up)
tp_trig
Propagation delay from trigger input to the DRV output (Vtrig goes up
from 0 to 5 V, tr_trig = 5 ns)
ttrig_light_load Light load turn off filter duration
ttrig_light_load_rec. IC operation recovery time when leaving light load disable mode
(Vtrig goes down from 5 to 0 V, tf_trig = 5 ns)
tt_blank
Blanking time of trigger/dis during DRV rising edge (VCS < Vth_cs_on,
single pulse on trigger/dis ttrig_pw = 50 ns)
Itrig Trigger input pull down current (Vtrig = 5 V)
MINIMUM Ton AND Toff ADJUST
Ton_min
Minimum Ton period (RT_on_min = 0 W)
Toff_min
Minimum Toff period (RT_off_min = 0 W)
Ton_min
Minimum Ton period (RT_on_min = 10 kW)
Toff_min
Minimum Toff period (RT_off_min = 10 kW)
Ton_min
Minimum Ton period (RT_on_min = 50 kW)
Toff_min
Minimum Toff period (RT_off_min = 50 kW)
3. Guaranteed by design.
4
4
4
4
4
4
4
3
2
3
2
3
2
30 −
−
1.5 − 2.5
− 13 30
70 100 130
− − 10
− 120 −
− 10 −
− 130 −
560 600 690
0.9 1.0 1.1
0.9 1.0 1.1
− 4.8 −
− 4.8 −
ns
V
ns
ms
us
ns
mA
ns
ns
ms
ms
ms
ms
http://onsemi.com
5
Free Datasheet http://www.datasheet4u.com/
5 Page NCP4304A, NCP4304B
4.200
9.35
4.180
4.160
9.30
4.140
9.25
4.120
4.100
9.20
4.080
9.15
4.060
4.040
9.10
4.020
−40 −25 −10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
Figure 34. Internal IC Consumption (B version,
No Load on Pin 8, FSW = 500 kHz,
Ton_min = 500 ns, Toff_min = 620 ns)
9.05
−40 −25 −10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
Figure 35. Internal IC Consumption (A Version,
Cload = 1 nF on Pin 8, FSW = 400 kHz,
Ton_min = 500 ns, Toff_min = 620 ns)
7.60 52.8
7.40 52.7
52.6
7.20
52.5
7.00 52.4
6.80 52.3
6.60 52.2
52.1
6.40 52.0
6.20 51.9
−40 −25 −10 5 20 35 50 65 80 95 110 125
−40 −25 −10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 36. Internal IC Consumption
Figure 37. Internal IC Consumption (A Version,
(B Version, Cload = 1 nF on Pin 8, FSW =
400 kHz, Ton_min = 500 ns, Toff_min = 620 ns)
Cload = 10 nF on Pin 8, FSW = 400 kHz,
Ton_min = 500 ns, Toff_min = 620 ns)
35.0
34.5
34.0
33.5
33.0
32.5−40 −25 −10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
Figure 38. Internal IC Consumption (B Version, Cload
= 10 nF on Pin 8, FSW = 400 kHz, Ton_min = 500 ns,
Toff_min = 620 ns)
http://onsemi.com
11
Free Datasheet http://www.datasheet4u.com/
11 Page |
Páginas | Total 32 Páginas | |
PDF Descargar | [ Datasheet NCP4304A.PDF ] |
Número de pieza | Descripción | Fabricantes |
NCP4304A | Secondary Side Synchronous Rectification Driver | ON Semiconductor |
NCP4304B | Secondary Side Synchronous Rectification Driver | ON Semiconductor |
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