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PDF ACPL-M21L Data sheet ( Hoja de datos )
| Número de pieza | ACPL-M21L | |
| Descripción | 5 MBd Digital CMOS Optocoupler | |
| Fabricantes | AVAGO | |
| Logotipo |  |
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ACPL-M21L, ACPL-021L and ACPL-024L
Low Power, 5 MBd Digital CMOS Optocoupler
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
Features
ACPL-M21L (single channel SO-5 package), ACPL-021L
(single channel SO-8 package) and ACPL-024L (dual
channel SO-8 package) are optically-coupled logic gates.
The detector IC has CMOS output stage and optical
receiver input stage with built-in Schmitt trigger to
provide logic-compatible waveforms, eliminating the
need for additional waveshaping.
An internal shield on the ACPL-M21L/021L/024L guar-
antees common mode transient immunity of 25 kV/μs
at a common mode voltage of 1000 V. The ACPL-x2xL
optocouplers' series operates from a 2.7 to 5.5 V
supply with guaranteed AC and DC performance from an
extended temperature range of -40° C to 105° C. Glitches
free output upon power-up and power-down of optocou-
pler.
CMOS output
Wide supply voltage: 2.7 V – 5.5 V
Low power supply current IDD: ≤ 1.1 mA max
Low forward current IF: 1.6 mA min
Speed: 5 MBd typ
Pulse width distortion (PWD): 200 ns max
Propagation delay skew (tpsk): 220 max
Propagation delay (tp): 250 ns max
Common mode rejection: 25 kV/s min at VCM = 1000 V
Hysteresis: 0.2 mA typ
Temperature range: -40° C to 105° C
Safety and regulatory approvals
Functional Diagram
Anode 1
6 VDD
5 VO
Cathode 3 Shield
4 GND
ACPL-M21L
TRUTH TABLE
(POSITIVE LOGIC)
LED VO
ON HIGH
OFF LOW
NC 1 8 VDD
Anode 2
7 VO
Cathode 3
NC 4
Shield
ACPL-021L
6 NC
5 GND
Anode1 1
8 VDD
Cathode1 2
7 V01
Cathode2 3
6 V02
Anode2 4
Shield
5 GND
ACPL-024L
A 0.1 F bypass capacitor must be connected between pins Vdd and GND
– UL 1577 recognized – 3750 Vrms for 1 minute for
ACPL-M21L/021L/024L
– CSA Approval
– IEC/EN 60747-5-5, Approval for Reinforced Insulation
Applications
Low isolation of high speed logic systems
Computer peripheral interface
Microprocessor system interface
Ground loop elimination
Pulse transformer replacement
High speed line receiver
Power control systems
Free Datasheet http://www.datasheet4u.com/
1 page  
Insulation and Safety Related Specifications
Parameter
Minimum External Air Gap
(Clearance)
Minimum External
Tracking (Creepage)
Minimum Internal Plastic Gap
(Internal Clearance)
Symbol
L(101)
L(102)
ACPL-024L
ACPL-M21L ACPL-021L
5 4.9
5 4.8
0.08 0.08
Tracking Resistance
(Comparative Tracking Index)
Isolation Group
CTI
175
IIIa
175
IIIa
Units
mm
mm
mm
Volts
Conditions
Measured from input terminals to output
terminals, shortest distance through air.
Measured from input terminals to output
terminals, shortest distance path along body.
Through insulation distance conductor to
conductor, usually the straight line distance
thickness between the emitter and detector.
DIN IEC 112/VDE 0303 Part 1
Material Group (DIN VDE 0110, 1/89, Table 1)
IEC/EN 60747-5-5 Insulation Characteristics* (Option 060)
Characteristic
Description
Symbol
ACPL-M21L/
024L/021L Unit
Installation classification per DIN VDE 0110/39, Table 1
for rated mains voltage ≤ 150 Vrms
for rated mains voltage ≤ 300 Vrms
for rated mains voltage ≤ 600 Vrms
for rated mains voltage ≤ 1000 Vrms
Climatic Classification
I – IV
I – III
I – II
55/105/21
Pollution Degree (DIN VDE 0110/39)
2
Maximum Working Insulation Voltage
Input to Output Test Voltage, Method b*
VIORM x 1.875 = VPR, 100% Production Test
with tm = 1 sec, Partial discharge < 5 pC
Input to Output Test Voltage, Method a*
VIORM x 1.6 = VPR, Type and Sample Test,
tm = 10 sec, Partial discharge < 5 pC
Highest Allowable Overvoltage
(Transient Overvoltage tini = 60 sec)
Safety-limiting values – maximum values allowed in
the event of a failure.
VIORM
VPR
VPR
VIOTM
567
1063
Vpeak
Vpeak
896
6000
Vpeak
Vpeak
Case Temperature
TS 150 °C
Input Current**
IS, INPUT
150 mA
Output Power**
PS, OUTPUT
600 mW
Insulation Resistance at TS, VIO = 500 V
RS
>109
* Refer to the optocoupler section of the Isolation and Control Components Designer’s Catalog, under Product Safety Regulations section,
(IEC/EN 60747-5-5) for a detailed description of Method a and Method b partial discharge test profiles.
** Refer to the following figure for dependence of PS and IS on ambient temperature.
5
Free Datasheet http://www.datasheet4u.com/
5 Page 
ACPL-M21L, ACPL-021L, ACPL-024L:
VI = 3.3 V: R1 = 510 ± 1%, R2 = 330 ± 1%
VI = 5.0 V: R1 = 1 k ± 1%, R2 = 600 ± 1%
RT = R1 + R2 R1/R2 ≈ 1.5
R1 IF
VI 1
6
R2
GND1
3
5
4
ACPL-M21L
VDD
C
Vo
GND2
C = 0.1μF
VI
GND2
1
R1 IF 2
R2
3
4
8 VDD VI R1 IF 1
R2
7 Vo1 GND1
2
C R2
6 Vo2 GND2
3
5 GND2
VI R1 IF 4
ACPL-021L
ACPL-024L
Figure 13. Recommended printed circuit board layout and input current limiting resistor selection
8
7
6
5
VDD
Vo1
C
Vo2
GND2
This preliminary data is provided to assist you in the evaluation of product(s) currently under development. Until
Avago Technologies releases this product for general sales, Avago Technologies reserves the right to alter prices,
specifications, features, capabilities, functions, release dates, and remove availability of the product(s) at anytime.
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2012 Avago Technologies. All rights reserved.
AV02-3462EN - July 24, 2012
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
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| PDF Descargar | [ Datasheet ACPL-M21L.PDF ] | |
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