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PDF IRF6721STRPBF Data sheet ( Hoja de datos )

Número de pieza IRF6721STRPBF
Descripción Power MOSFET ( Transistor )
Fabricantes International Rectifier 
Logotipo International Rectifier Logotipo



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PD - 96133A
IRF6721SPbF
l RoHS Compliant and Halogen Free 
l Low Profile (<0.7 mm)
l Dual Sided Cooling Compatible 
l Ultra Low Package Inductance
l Optimized for High Frequency Switching 
l Ideal for CPU Core DC-DC Converters
l Optimized for Control FET application
l Low Conduction and Switching Losses
l Compatible with existing Surface Mount Techniques 
l 100% Rg tested
IRF6721STRPbF
DirectFET™ Power MOSFET ‚
Typical values (unless otherwise specified)
VDSS
VGS
RDS(on)
RDS(on)
30V max ±20V max 5.1m@ 10V 8.5m@ 4.5V
Qg tot Qgd
Qgs2
Qrr
Qoss Vgs(th)
11nC 3.7nC 1.3nC 19nC 7.9nC 1.9V
SQ
DirectFET™ ISOMETRIC
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ SX ST
MQ MX MT MP
Description
The IRF6721SPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve
the lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is
compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection
soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET pack-
age allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6721SPbF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and
switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of
processors operating at higher frequencies. The IRF6721SPbF has been optimized for parameters that are critical in synchronous buck
operating from 12 volt bus converters including Rds(on) and gate charge to minimize losses.
Absolute Maximum Ratings
Parameter
VDS Drain-to-Source Voltage
VGS
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC = 25°C
IDM
EAS
IAR
Gate-to-Source Voltage
eContinuous Drain Current, VGS @ 10V
eContinuous Drain Current, VGS @ 10V
fContinuous Drain Current, VGS @ 10V
gPulsed Drain Current
hSingle Pulse Avalanche Energy
ÃgAvalanche Current
Max.
30
±20
14
11
60
110
62
11
Units
V
A
mJ
A
25
ID = 14A
20
15
10 TJ = 125°C
5
TJ = 25°C
0
0 5 10 15 20
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
www.irf.com
14.0
12.0
10.0
ID= 11A
VDS= 24V
VDS= 15V
8.0
6.0
4.0
2.0
0.0
0 4 8 12 16 20 24 28 32
QG, Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs. Gate-to-Source Voltage
„ TC measured with thermocouple mounted to top (Drain) of part.
… Repetitive rating; pulse width limited by max. junction temperature.
† Starting TJ = 25°C, L = 1.1mH, RG = 25, IAS = 11A.
1
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IRF6721STRPBF pdf
1000
100 TJ = 150°C
TJ = 25°C
TJ = -40°C
10
1
VGS = 0V
0
0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
VSD, Source-to-Drain Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
60
50
40
30
20
10
0
25 50 75 100 125 150
TC , Case Temperature (°C)
Fig 12. Maximum Drain Current vs. Case Temperature
250
200
150
IRF6721SPbF
1000
100
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100µsec
10
1msec
1 10msec
DC
0.1 TA = 25°C
TJ = 150°C
Single Pulse
0.01
0.01
0.10
1.00
10.00 100.00
VDS, Drain-to-Source Voltage (V)
Fig11. Maximum Safe Operating Area
3.0
2.5
2.0
ID = 25µA
ID = 100µA
1.5
ID = 150µA
ID = 250µA
ID = 1.0mA
ID = 1.0A
1.0
-75 -50 -25
0
25 50 75 100 125 150
TJ , Temperature ( °C )
Fig 13. Typical Threshold Voltage vs. Junction
Temperature
ID
TOP 0.82A
1.0A
BOTTOM 11A
100
50
www.irf.com
0
25 50 75 100 125 150
Starting TJ , Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy vs. Drain Current
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