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PDF FSL137MRIN Data sheet ( Hoja de datos )
| Número de pieza | FSL137MRIN | |
| Descripción | Green-Mode Fairchild Power Switch | |
| Fabricantes | Fairchild Semiconductor | |
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March 2013
FSL137MRIN
Green-Mode Fairchild Power Switch (FPS™)
Features
Advanced Soft Burst Mode for Low Standby Power
and Low Audible Noise
Random Frequency Fluctuation (RFF) for Low EMI
Under 50 mW Standby Power Consumption at
265 VAC, No-load Condition with Burst Mode
Pulse-by-Pulse Current Limit
Overload Protection (OLP), Over-Voltage
Protection (OVP), Abnormal Over-Current
Protection (AOCP), Internal Thermal Shutdown
(TSD) with Hysteresis, Output-Short Protection
(OSP), and Under-Voltage Lockout (UVLO) with
Hysteresis, Line Over-Voltage Protection (LOVP)
Low Operating Current (0.4 mA) in Burst Mode
Internal Startup Circuit
Internal High-Voltage SenseFET: 700 V
Built-in Soft-Start: 15 ms
Auto-Restart Mode
Applications
Power Supply for Home Appliances, LCD Monitors,
STBs, and DVD Players
Description
The FSL137MRIN is an integrated Pulse Width
Modulation (PWM) controller and SenseFET specifically
designed for offline Switched Mode Power Supplies
(SMPS) with minimal external components. The PWM
controller includes an integrated fixed-frequency
oscillator, Line Over-Voltage Protection (LOVP), Under-
Voltage Lockout (UVLO), Leading-Edge Blanking (LEB),
optimized gate driver, internal soft-start, temperature-
compensated precise current sources for loop
compensation, and self-protection circuitry.
Compared with a discrete MOSFET and PWM controller
solution, the FSL137MRIN reduces total cost,
component count, size, and weight; while
simultaneously increasing efficiency, productivity, and
system reliability. This device provides a basic platform
suited for cost-effective design of flyback converters.
Ordering Information
Part Number
Package(1)
Operating Current
Junction Limit
Temperature (Typ.)
Output Power Table(2)
RDS(ON) 230 VAC ±15%
(Max.)
Adapter(3)
Open
Frame(4)
85-265 VAC
Adapter(3)
Open
Frame(4)
FSL137MRIN
8-DIP -40°C ~ +125°C 1.3 A 4.75 25 W
30 W
15 W
20 W
Notes:
1. Lead-free package per JEDEC J-STD-020B.
2. The junction temperature can limit the maximum output power.
3. Typical continuous power in a non-ventilated enclosed adapter measured at 50C ambient temperature.
4. Maximum practical continuous power in an open-frame design at 50C ambient temperatures.
© 2012 Fairchild Semiconductor Corporation
FSL137MRIN • Rev. 1.0.1
www.fairchildsemi.com
1 page  
Electrical Characteristics
TJ = 25C unless otherwise specified.
Symbol
Parameter
SenseFET Section
BVDSS Drain-Source Breakdown Voltage
IDSS Zero-Gate-Voltage Drain Current
RDS(ON)
CISS
COSS
Drain-Source On-State Resistance
Input Capacitance(11)
Output Capacitance(11)
tr Rise Time
tf Fall Time
td(on)
Turn-On Delay
td(off)
Turn-Off Delay
Control Section
fS Switching Frequency(11)
fS Switching Frequency Variation(11)
DMAX Maximum Duty Ratio
DMIN Minimum Duty Ratio
IFB Feedback Source Current
VSTART
VSTOP
UVLO Threshold Voltage
tSS Internal Soft-Start Time
VRECOMM Recommended VCC Range
Burst Mode Section
VBURH
VBURL
Hys
Burst-Mode Voltage
Protection Section
ILIM
VSD
IDELAY
tLEB
VOVP
VINH
Peak Drain Current Limit
Shutdown Feedback Voltage
Shutdown Delay Current
Leading-Edge Blanking Time(10,12)
Over-Voltage Protection
Line Over-Voltage Protection
Threshold Voltage
VINHYS
Line Over-Voltage Protection
Hysteresis
tOSP
VOSP
tOSP_FB
TSD
THYS
Output-Short
Protection(11)
Threshold Time
Threshold VFB
VFB Blanking Time
Thermal Shutdown Temperature(11)
Conditions
Min. Typ. Max. Unit
VCC=0 V, ID=250 A
VDS=560 V, TA=125C
VGS=10 V, ID=1 A
VDS=25 V, VGS=0 V, f=1 MHz
VDS=25 V, VGS=0 V, f=1 MHz
VDS=325 V, ID=4 A, RG=25 Ω
VDS=325 V, ID=4 A, RG=25 Ω
VDS=325 V, ID=4 A, RG=25 Ω
VDS=325 V, ID=4 A, RG=25 Ω
700
4.00
315
47
34
32
11.2
28.2
250
4.75
V
µA
Ω
pF
pF
ns
ns
ns
ns
VCC=14 V, VFB=4 V
-25C < TJ < 125C
VCC=14 V, VFB=4 V
VCC=14 V, VFB=0 V
VFB=0 V
VFB=0 V, VCC Sweep
After Turn-on, VFB =0 V
VSTR=40 V, VCC Sweep
61 67 73 kHz
±5 ±10 %
61 67 73 %
0%
65 90 115 µA
11 12 13
7.0 7.5 8.0
V
15 ms
13 23 V
VCC=14 V, VFB Sweep
0.45 0.50 0.55
0.30 0.35 0.40
150
V
V
mV
di/dt=300 mA/s
VCC=14 V, VFB Sweep
VCC=14 V, VFB=4 V
VCC Sweep
VCC=14 V, VIN Sweep
1.1 1.3 1.5
6.45 7.00 7.55
1.2 2.0 2.8
300
23.0 24.5 26.0
1.885 1.950 2.015
A
V
µA
ns
V
V
VCC=14 V, VIN Sweep
OSP Triggered when
tON<tOSP & VFB>VOSP
(Lasts Longer than tOSP_FB)
Shutdown Temperature
Hysteresis
0.06 V
0.7 1.0 1.3
1.8 2.0 2.2
2.0 2.5 3.0
125 135 145
60
µs
V
µs
C
C
Continued on the following page…
© 2012 Fairchild Semiconductor Corporation
FSL137MRIN • Rev. 1.0.1
5
www.fairchildsemi.com
5 Page 
4. Protection Circuits: The FSL137MRIN has several
self-protective functions; such as Overload Protection
(OLP), Abnormal Over-Current Protection (AOCP),
Output-Short Protection (OSP), Over-Voltage Protection
(OVP), and Thermal Shutdown (TSD). All the
protections are implemented as auto-restart. Once a
fault condition is detected, switching is terminated and
the SenseFET remains off. This causes VCC to fall.
When VCCB B falls to the Under-Voltage Lockout (UVLO)
stop voltage of 7.5 V, the protection is reset and the
startup circuit charges the VCC capacitor. When VCC
reaches the start voltage of 12.0 V, normal operation
resumes. If the fault condition is not removed, the
SenseFET remains off and VCC drops to stop voltage
again. In this manner, the auto-restart can alternately
enable and disable the switching of the power
SenseFET until the fault condition is eliminated.
Because these protection circuits are fully integrated
into the IC without external components, reliability is
improved without increasing cost.
Power
VDS on
Fault
occurs
Fault
removed
increasing until it reaches 7.0 V, when the switching
operation is terminated, as shown in Figure 22. The
delay for shutdown is the time required to charge CFB
from 2.5 V to 7.0 V with 2.0 µA. A 25 ~ 50 ms delay is
typical for most applications. This protection is
implemented as auto-restart.
VFB
Overload Protection
7.0V
2.5V
t12= CFB×(7.0-2.5)/Idelay
t1 t2
Figure 22. Overload Protection
t
VCC
12.0V
7.5V
t
Figure 21.
Normal
operation
Fault
situation
Normal
operation
Auto-Restart Protection Waveforms
4.1 Overload Protection (OLP): Overload is defined
as the load current exceeding its normal level due to
an unexpected abnormal event. In this situation, the
protection circuit should trigger to protect the SMPS.
However, even when the SMPS is in normal
operation, the overload protection circuit can be
triggered during the load transition. To avoid this
undesired operation, the overload protection circuit is
designed to trigger only after a specified time to
determine whether it is a transient situation or a true
overload situation. Because of the pulse-by-pulse
current-limit capability, the maximum peak current
through the SenseFET is limited and, therefore, the
maximum input power is restricted with a given input
voltage. If the output consumes more than this
maximum power, the output voltage (VOUT) decreases
below the set voltage. This reduces the current
through the opto-coupler LED, which also reduces the
opto-coupler transistor current, increasing the
feedback voltage (VFB). If VFB exceeds 2.5 V, D1 is
blocked and the 2.0 µA current source starts to
charge CFB slowly up. In this condition, VFB continues
© 2012 Fairchild Semiconductor Corporation
FSL137MRIN • Rev. 1.0.1
11
4.2 Abnormal Over-Current Protection (AOCP):
When the secondary rectifier diodes or the
transformer pins are shorted, a steep current with
extremely high di/dt can flow through the SenseFET
during the minimum turn-on time. Even though the
FSL137MRIN has overload protection, it is not
enough to protect the FSL137MRIN in that abnormal
case; due to the severe current stress imposed on the
SenseFET until OLP is triggered. The internal AOCP
circuit is shown in Figure 23. When the gate turn-on
signal is applied to the power SenseFET, the AOCP
block is enabled and monitors the current through the
sensing resistor. The voltage across the resistor is
compared with a preset AOCP level. If the sensing-
resistor voltage is greater than the AOCP level, the
set signal is applied to the S-R latch, resulting in the
shutdown of the SMPS.
Drain
6,7,8
OSC
3R
VFB* R
PWM
Gate
Driver
LEB (300ns)
QS
QR
VCC Good
RSENSE
VAOCP
GND
1
Figure 23. Abnormal Over-Current Protection
www.fairchildsemi.com
11 Page | ||
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| PDF Descargar | [ Datasheet FSL137MRIN.PDF ] | |
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