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(AD5629R / AD5669R) Octal / 12-/16-Bit / I2C / denseDACs - Analog Devices

Número de pieza AD5669R
Descripción (AD5629R / AD5669R) Octal / 12-/16-Bit / I2C / denseDACs
Fabricantes Analog Devices 
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AD5669R datasheet

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AD5669R pdf
Data Sheet
AD5629R/AD5669R
VDD = 2.7 V to 3.6 V, RL = 2 kΩ to GND, CL = 200 pF to GND, VREFIN = VDD. All specifications TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
STATIC PERFORMANCE 2
AD5629R
Resolution
Relative Accuracy
Differential Nonlinearity
AD5669R
Resolution
Relative Accuracy
Differential Nonlinearity
Zero-Code Error
Zero-Code Error Drift
Full-Scale Error
Gain Error
Gain Temperature Coefficient
Offset Error
DC Power Supply Rejection
Ratio
DC Crosstalk
(External Reference)
DC Crosstalk
(Internal Reference)
OUTPUT CHARACTERISTICS 3
Output Voltage Range
Capacitive Load Stability
DC Output Impedance
Short-Circuit Current
Power-Up Time
REFERENCE INPUTS
Reference Current
Reference Input Range
Reference Input Impedance
REFERENCE OUTPUT
Output Voltage
AD5629R/AD5669R
Reference Tempco3
Reference Output Impedance
LOGIC INPUTS3
Input Current
Input Low Voltage, VINL
Input High Voltage, VINH
Pin Capacitance
A Grade 1
Min Typ Max
12
±0.5 ±4
±0.25
16
±8 ±32
±1
6 19
±2
−0.2 −1
±1
±2.5
±6 ±19
–80
10
5
10
25
10
0 VDD
2
10
0.5
30
4
40 50
0 VDD
14.6
1.247
1.253
±15
7.5
±3
0.8
2
3
B Grade1
Min Typ Max
12
±0.5 ±1
±0.25
16
±8 ±16
±1
6 19
±2
−0.2 −1
±1
±2.5
±6 ±19
–80
10
5
10
25
10
0 VDD
2
10
0.5
30
4
40 50
0 VDD
14.6
1.247
±5
±15
7.5
1.253
±15
±3
0.8
2
3
Unit
Bits
LSB
LSB
Bits
LSB
LSB
mV
µV/°C
% FSR
% FSR
ppm
mV
dB
µV
µV/mA
µV
µV
µV/mA
V
nF
nF
mA
µs
µA
kΩ
V
ppm/°C
kΩ
µA
V
V
pF
Conditions/Comments
See Figure 6
Guaranteed monotonic by design (see Figure 8)
See Figure 5
Guaranteed monotonic by design (see Figure 7)
All 0s loaded to DAC register (see Figure 18)
All 1s loaded to DAC register (see Figure 19)
Of FSR/°C
VDD ± 10%
Due to full-scale output change,
RL = 2 kΩ to GND or VDD
Due to load current change
Due to powering down (per channel)
Due to full-scale output change,
RL = 2 kΩ to GND or VDD
Due to load current change
RL = ∞
RL = 2 kΩ
VDD = 3 V
Coming out of power-down mode, VDD = 3 V
VREFIN = VDD = 3.6 V (per DAC channel)
TA = 25°C
LFCSP, TSSOP
WLCSP
All digital inputs
VDD = 3 V
VDD = 3 V
Rev. B | Page 5 of 32
Free Datasheet http://www.datasheet4u.com/

5 Page

AD5669R arduino
AD5629R/AD5669R
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD5629R/AD5669R
Data Sheet
VDD 1
VOUTA 2
VOUTC 3
VOUTE 4
TOP VIEW
(Not to Scale)
12 GND
11 VOUTB
10 VOUTD
9 VOUTF
NOTES
1. EXPOSED PAD MUST BE TIED TO GND.
Figure 3. 16-Lead LFCSP (CP-16-17)
LDAC 1
A0 2
VDD 3
VOUTA 4
VOUTC 5
VOUTE 6
VOUTG 7
VREFIN/VREFOUT 8
16 SCL
15 SDA
AD5629R/
AD5669R
TOP VIEW
(Not to Scale)
14 GND
13 VOUTB
12 VOUTD
11 VOUTF
10 VOUTH
9 CLR
Figure 4. 16-Lead TSSOP (RU-16)
BALL A1
INDICATOR
1 234
GND SCL SDA A0
A
VOUTB LDAC VDD VOUTA
B
VOUTF VOUTD VOUTE VOUTC
C
VOUTH CLR VREF VOUTG
D
TOP VIEW
(BALL SIDE DOWN)
Not to Scale
Figure 5. 16-Ball WLCSP
Rev. B | Page 10 of 32
Free Datasheet http://www.datasheet4u.com/

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