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PDF TJ47300 Data sheet ( Hoja de datos )
| Número de pieza | TJ47300 | |
| Descripción | 3.0A Low Output Voltage Ultra LDO Regulator | |
| Fabricantes | HTC Korea | |
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3.0A Low Output Voltage Ultra LDO Regulator
TJ47300
FEATURES
Works with 1.25V ~ 5.5V VIN
Ultra Low Dropout Voltage
Low Quiescent Current
Excellent Line and Load Regulation
Guaranteed Output Current of 3.0A
Adjustable Output Voltage Down to 0.8V
VOUT Power OK Signal
Logic Controlled Shutdown Option
Over-Temperature/Over-Current Protection
-40℃ to 125℃ Junction Temperature Range
SOP‐8‐PP
APPLICATION
Motherboards and Graphic Cards
Microprocessor and Chipset Power Supplies
Peripheral Cards
Low Voltage Digital ICs
High Efficiency Linear Regulators
DESCRIPSION
The TJ47300 is a 3.0A high performance ultra low-
dropout linear regulator ideal for powering core voltages
of low-power microprocessors. The TJ47300 implements
a dual supply configuration allowing for very low output
impedance. The TJ47300 requires a bias input supply
and a main input supply, allowing for ultra-low input
voltages on the main supply rail. The input supply
operates from 1.25V to 5.5V and the bias supply requires
between 3V and 5.5V for proper operation. The TJ47300
delivers high current and ultra-low-dropout output
voltage as low as 0.8V for applications where VOUT is very
close to VIN. The TJ47300 is developed on a CMOS
technology which allows low quiescent current operation
independent of output current. This technology also
allows the TJ47300 to operate under extremely low
dropout conditions.
ORDERING INFORMATION
Device
TJ47300GDP
Package
SOP8-PP
ABSOLUTE MAXIMUM RATINGS
CHARACTERISTIC
SYMBOL
MIN.
MAX.
Input Supply Voltage (Survival)
Enable Input Voltage (Survival)
Bias Supply Voltage (Survival)
Output Voltage (Survival)
Lead Temperature (Soldering, 5 sec)
Storage Temperature Range
Operating Junction Temperature Range
Package Thermal Resistance *
VIN
VEN
VBIAS
VOUT
TSOL
TSTG
TJOPR
ΘJA-SOP8-PP
-0.3 6
-0.3 6
-0.3 6
-0.3 VIN +0.3
260
-65 150
-40 125
68
* Calculated from package in still air, mounted to 2.6mm X 3.5mm(minimum foot print) 2 layer PCB without thermal vias per JESD51 standards.
2011 Preliminary
-1-
UNIT
V
V
V
V
℃
℃
℃
ºC/W
HTC
Free Datasheet http://www.datasheet4u.com/
1 page  
3.0A Low Output Voltage Ultra LDO Regulator
TJ47300
ELECTRICAL CHARACTERISTICS
Unless otherwise specified: VBIAS = 5V, VIN = VO(NOM) + 1V, VEN=VBIAS, IL = 10 mA, TA=25℃.
PARAMETER
SYMBOL
TEST CONDITION
MIN. TYP. MAX. UNIT
Power Input Voltage
VIN VOUT=VREF
1.25 -
5.5 V
Bias Input Voltage
Reference Voltage
VIN Line Regulation(Note 1)
VBIAS Line Regulation(Note 2)
Load Regulation(Note 1, 3)
VBIAS
VREF
ΔVLINE(IN)
VOUT=VREF
VBIAS=VIN=VEN=5.0V, IOUT=10mA,
VOUT=VREF
VOUT+1V<VIN<5.5V, IOUT=10mA
ΔVLINE(BIAS) VIN=3.3V, IOUT=10mA, VOUT=VREF
ΔVLOAD
10mA < IL <3A,
VOUT=VREF
VCNTL=VIN=VEN=5.0V,
IL = 1.0A, VBIAS=VEN=5.0V, VOUT=VREF
3.0 - 5.5 V
0.784 0.8 0.816 V
- 0.02 0.10 %/V
- 0.02 0.10 %/V
- 0.20 0.75 %
- 120 150
Dropout Voltage
VDROP
IL = 2.0A, VBIAS=VEN=5.0V, VOUT=VREF
- 240 300 mV
IL = 3.0A, VBIAS=VEN=5.0V, VOUT=VREF
- 380 450
Ground Pin Current(Note 4)
IGND1
IGND2
IL = 10mA
IL = 3.0 A
VEN < 0.4 V, POK=open (Note5)
- 0.1 1.0 mA
- 0.1 1.0 mA
- - 150 uA
Enable Threshold
Logic High VIH
Logic Low VIL
Output=High
Output=Low
2.0 -
-V
- - 0.4 V
EN Input Current
IEN VEN=VCNTL=5.0V
- - 0.5 uA
FB Power OK Threshold
VPOKTH
IOUT=0A, VCNTL=VIN=VEN=5.0V, VOUT=VREF
-
90
-%
Power OK Hysteresis
OCP Threshold Level
VPOKHYS
IOUT=0A, VCNTL=VIN=VEN=5.0V, VOUT=VREF
-
10
-%
IOCP
VCNTL=VIN=VEN=5.0V, VOUT=VREF
- 4.5 - A
Thermal Shutdown Temperature TSD
- 165 - ℃
Thermal Shutdown Hysteresis
ΔTSD
- 10 - ℃
Note 1. Output voltage line regulation is defined as the change in output voltage from the nominal value due to change in the
input line voltage. Output voltage load regulation is defined as the change in output voltage from the nominal value
due to change in load current.
Note 2. Output voltage line regulation is defined as the change in output voltage from the nominal value due to change in the
bias line voltage.
Note 3. Regulation is measured at constant junction temperature by using a 10ms current pulse. Devices are tested for load
regulation in the load range from 10mA to 3.0A
Note 4. IGND = IBIAS + (IIN – IOUT). The total current drawn from the supply is the sum of the load current plus the ground
current.
Note 5. When POK pin is applied to VBIAS through the resistor R3, IGND2 should be added to the bias current (VBIAS - VPOK ) / R3.
2011 Preliminary
5
HTC
Free Datasheet http://www.datasheet4u.com/
5 Page 
3.0A Low Output Voltage Ultra LDO Regulator
TJ47300
Decoupling (Bypass) Capacitor
In very electrically noisy environments, it is recommended that additional ceramic capacitors be placed
from VIN to GND. The use of multiple lower value ceramic capacitors in parallel with output capacitor also
allows to achieve better transient performance and stability if required by the application. (See Fig.1)
Feed-Forward Capacitor
To get the higher PSRR than the inherent performance of TJ47300, it is recommended that additional
ceramic feed-forward capacitor be placed from OUT pin to FB pin. The capacitance of feed-forward
capacitor with range of 10pF to 1uF allows to achieve better PSRR performance when required by the
application. (See Fig.1)
Fig. 1 Application with Decoupling & Feed-Forward Capacitor
Maximum Output Current Capability
The TJ47300 can deliver a continuous current of 3.0A over the full operating junction temperature range.
However, the output current is limited by the restriction of power dissipation which differs from packages.
A heat sink may be required depending on the maximum power dissipation and maximum ambient
temperature of application. With respect to the applied package, the maximum output current of 3.0A
may be still undeliverable due to the restriction of the power dissipation of TJ47300. Under all possible
conditions, the junction temperature must be within the range specified under operating conditions.
The temperatures over the device are given by:
TC = TA + PD X θCA / TJ = TC + PD X θJC / TJ = TA + PD X θJA
where TJ is the junction temperature, TC is the case temperature, TA is the ambient temperature, PD is the
total power dissipation of the device, θCA is the thermal resistance of case-to-ambient, θJC is the thermal
resistance of junction-to-case, and θJA is the thermal resistance of junction to ambient.
The total power dissipation of the device is given by:
PD = PIN – POUT = {(VIN X IIN) + (VBIAS X IBIAS)} – (VOUT X IOUT)
The maximum allowable temperature rise (TRmax) depends on the maximum ambient temperature
(TAmax) of the application, and the maximum allowable junction temperature (TJmax):
TRmax = TJmax – TAmax
The maximum allowable value for junction-to-ambient thermal resistance, θJA, can be calculated using the
formula:
θJA = TRmax / PD = (TJmax – TAmax) / PD
TJ47300 is available in SOP8-PP package.
or heat sink, and on air flow.
The thermal resistance depends on amount of copper area
2011 Preliminary
11
HTC
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet TJ47300.PDF ] | |
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