PDF ICS9LPRS480 Data sheet ( Hoja de datos )

Número de pieza	ICS9LPRS480
Descripción	Programmable System Clock Chip
Fabricantes	Integrated Device Technology
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No Preview Available ! Integrated Circuit Systems, Inc. ICS9LPRS480 Programmable System Clock Chip for ATI RS780 - K8TM based Systems Recommended Application: ATI RS780 systems using AMD K8 processors Output Features: • Integrated series resistors on all differential outputs. • 1 - Greyhound compatible K8 CPU pairs • 5 - low-power differential SRC pairs • 2 - low-power differential chipset SouthBridge SRC pairs • 1 - Selectable low-power differential 100MHz non-spread SATA/ SRC output • 1 - Selectable low-power differential SRC / 27MHz Single Ended outputs • 1 - Selectable HT3 100MHz low-power differential hypertransport clock / HT66MHz Single Ended outputs • 1 - 48MHz USB clock • 3 - 14.318MHz Reference clock • 2 - low-power differential ATIG pairs • 5- Dedicated CLKREQ# pins Key Specifications: • CPU outputs cycle-to-cycle jitter < 150ps • SRC outputs cycle-to-cycle jitter < 125ps • SB_SRC outputs cycle-to-cycle jitter < 125ps • +/- 100ppm frequency accuracy on CPU, SRC, ATIG • 0ppm frequency accuracy on 48MHz Features/Benefits: • Power Saving Features: Optional Separate supply rail for SRC low Voltage I/O - ~33% power saving when 1.5V is used for this rail • Spread Spectrum for EMI reduction • Outputs may be disabled via SMBus • External crystal load capacitors for maximum frequency accuracy Pin Configuration 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 GND48 1 SMBCLK 2 SMBDAT 3 VDD 4 SRC7C_LPRS/27MHz_NS 5 SRC7T_LPRS/27MHz_SS 6 GND 7 SRC4C_LPRS 8 SRC4T_LPRS 9 ICS9LPRS480 GNDSRC 10 VDDSRC_IO 11 SRC3C_LPRS 12 SRC3T_LPRS 13 SRC2C_LPRS 14 SRC2T_LPRS 15 VDDSRC 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 48 VDDCPU 47 VDDCPU_IO 46 GNDCPU 45 CLKREQ1#* 44 CLKREQ2#* 43 GNDSATA 42 SRC6T/SATAT_LPRS 41 SRC6C/SATAC_LPRS 40 VDDSATA 39 CLKREQ3#* 38 CLKREQ4#* 37 SB_SRC0T_LPRS 36 SB_SRC0C_LPRS 35 VDDSB_SRC 34 VDDSB_SRC_IO 33 GNDSB_SRC 1391D—02/02/09 Other names and brands may be claimed as the property of others. Free Datasheet http://www.datasheet4u.com/ 1 page Integrated Circuit Systems, Inc. ICS9LPRS480 TSSOP Pin Description PIN # PIN NAME 1 REF1/SEL_SATA 2 REF0/SEL_HTT66 3 GNDREF 4 X1 5 X2 6 VDD48 7 48MHz_0 8 GND48 9 SMBCLK 10 SMBDAT 11 VDD27 12 SRC7C_LPRS/27MHz_NS 13 SRC7T_LPRS/27MHz_SS 14 GND27 15 SRC4C_LPRS 16 SRC4T_LPRS 17 GNDSRC 18 VDDSRC_IO 19 SRC3C_LPRS 20 SRC3T_LPRS 21 SRC2C_LPRS 22 SRC2T_LPRS 23 VDDSRC 24 VDDSRC_IO 25 GNDSRC 26 SRC1C_LPRS 27 SRC1T_LPRS 28 SRC0C_LPRS 29 SRC0T_LPRS 30 CLKREQ0# 31 GNDATIG 32 VDDATIG_IO PIN TYPE I/O I/O GND IN OUT PWR OUT GND IN I/O PWR OUT OUT GND OUT OUT GND PWR OUT OUT OUT OUT PWR PWR GND OUT OUT OUT OUT IN GND PWR DESCRIPTION 14.318 MHz 3.3V reference clock./ 3.3V tolerant latched input to select function of SRC6/SATA output 0 = 100MHz differential spreading SRC clock, 1 = 100MHz non-spreading differential SATA clock 14.318 MHz 3.3V reference clock./ 3.3V tolerant latched input to select Hyper Transport Clock Frequency. 0 = 100MHz differential HTT clock, 1 = 66MHz 3.3V single ended HTT clock Ground pin for the REF outputs. Crystal input, nominally 14.318MHz Crystal output, nominally 14.318MHz Power pin for the 48MHz outputs and core. 3.3V 48MHz clock output. Ground pin for the 48MHz outputs Clock pin of SMBus circuitry, 5V tolerant. Data pin for SMBus circuitry, 5V tolerant. 3.3V Power supply for SRC/27MHz output and 27MHz SS PLL True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed)/27MHz 3.3V Single-ended non-spread output for discrete graphics Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed)/27MHz 3.3V Single-ended spreading output for discrete graphics Ground for the SRC/27MHz outputs Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed) True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed) Ground pin for the SRC outputs Power supply for differential SRC outputs, nominal 1.05V to 3.3V Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed) True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed) Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed) True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed) Supply for SRC core, 3.3V nominal Power supply for differential SRC outputs, nominal 1.05V to 3.3V Ground pin for the SRC outputs Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed) True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed) Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed) True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed) Clock Request pin for SRC0 outputs. If output is selected for control, then that output is controlled as follows: 0 = enabled, 1 = Low-Low Ground pin for the ATIG outputs Power supply for differential ATIG outputs, nominal 1.05V to 3.3V 1391D—02/02/09 5 5 Page Integrated Circuit Systems, Inc. Differential Output Power Management Table True Complement PD# CLKREQ# SMBus output Output Register OE Free-Run 1 0 Enable Running 0X X Low/20K 1 1 Enable Running X X Disable Low/20K Note: 20K means 20Kohm Pull Down Running Low Running Low True output Complement Output CLKREQ# Selected Running Low/20K Low/20K Low/20K Running Low Low Low Singled-ended Power Management Table SMBus PD# Register OE 48MHz 27MHz 1 Enable Running Running 0 Enable Low Low HTT66MHz Running Low REF(2:0) Running Hi-Z ICS9LPRS480 1391D—02/02/09 11 11 Page

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Número de pieza	Descripción	Fabricantes
ICS9LPRS480	Programmable System Clock Chip	Integrated Device Technology

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