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PDF FDMS86101DC Data sheet ( Hoja de datos )
| Número de pieza | FDMS86101DC | |
| Descripción | N-Channel MOSFET | |
| Fabricantes | Fairchild Semiconductor | |
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FDMS86101DC
N-Channel Dual CoolTM Power Trench® MOSFET
February 2012
100 V, 60 A, 7.5 mΩ
Features
Dual CoolTM Top Side Cooling PQFN package
Max rDS(on) = 7.5 mΩ at VGS = 10 V, ID = 14.5 A
Max rDS(on) = 12 mΩ at VGS = 6 V, ID = 11.5 A
High performance technology for extremely low rDS(on)
100% UIL Tested
RoHS Compliant
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced Power Trench® process.
Advancements in both silicon and Dual CoolTM package
technologies have been combined to offer the lowest rDS(on)
while maintaining excellent switching performance by extremely
low Junction-to-Ambient thermal resistance.
Applications
Primary DC-DC MOSFET
Secondary Synchronous Rectifier
Load Switch
Pin 1
S
D
D
D
D
S
S
D
D
G
S
S
S
Pin 1
Top
Power 56
Bottom
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous (Package limited)
-Continuous (Silicon limited)
-Continuous
-Pulsed
TC = 25 °C
TC = 25 °C
TA = 25 °C
Single Pulse Avalanche Energy
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
S
G
(Note 1a)
(Note 3)
(Note 1a)
D
D
Ratings
100
±20
60
88
14.5
200
216
125
3.2
-55 to +150
Units
V
V
A
mJ
W
°C
RθJC
RθJC
RθJA
RθJA
RθJA
RθJA
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Top Source)
(Bottom Drain)
(Note 1a)
(Note 1b)
(Note 1i)
(Note 1j)
(Note 1k)
2.3
1.0
38
81
16
23
11
°C/W
Device Marking
86101
Device
FDMS86101DC
Package
Dual CoolTM Power 56
Reel Size
13’’
Tape Width
12 mm
Quantity
3000 units
©2012 Fairchild Semiconductor Corporation
FDMS86101DC Rev. C1
1
www.fairchildsemi.com
Free Datasheet http://www.datasheet4u.com/
1 page  
Typical Characteristics TJ = 25 °C unless otherwise noted
10
ID = 14.5 A
8
6
4
VDD = 25 V
VDD = 50 V
VDD = 75 V
5000
1000
100
Ciss
Coss
2
0
0 8 16 24 32
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
f = 1 MHz
VGS = 0 V
10
0.1
1
Crss
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
100
Figure8. CapacitancevsDrain
to Source Voltage
100
TJ = 25 oC
10 TJ = 100 oC
TJ = 125 oC
1
0.001
0.01 0.1 1 10
tAV, TIME IN AVALANCHE (ms)
Figure9. Unclamped Inductive
Switching Capability
100 300
90
75
60
45
Limited by Package
30
VGS = 10 V
VGS = 6 V
15
RθJC = 1.0 oC/W
0
25 50 75 100 125
TC, CASE TEMPERATURE (oC)
150
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
300
100
10 1 ms
1 THIS AREA IS
LIMITED BY rDS(on)
10 ms
100 ms
0.1
0.01
0.01
SINGLE PULSE
TJ = MAX RATED
RθJA = 81 oC/W
TA = 25 oC
0.1 1
10
1s
10 s
DC
100 500
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
2000
1000
100
SINGLE PULSE
RθJA = 81 oC/W
TA = 25 oC
10
1
10-3
10-2
10-1
1
10
t, PULSE WIDTH (sec)
100
Figure 12. Single Pulse Maximum
Power Dissipation
1000
©2012 Fairchild Semiconductor Corporation
FDMS86101DC Rev. C1
5
www.fairchildsemi.com
5 Page | ||
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| PDF Descargar | [ Datasheet FDMS86101DC.PDF ] | |
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