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PDF 25AA02UID Data sheet ( Hoja de datos )
| Número de pieza | 25AA02UID | |
| Descripción | 2K SPI Bus Serial EEPROM | |
| Fabricantes | Microchip Technology | |
| Logotipo |  |
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25AA02UID
2K SPI Bus Serial EEPROM with Unique 32-Bit Serial Number
Device Selection Table
Part Number
25AA02UID
VCC Range
1.8-5.5V
Page Size
16 Bytes
Features:
• Preprogrammed 32-Bit Serial Number:
- Unique across all UID-family EEPROMs
- Scalable to 48-bit, 64-bit, 128-bit, 256-bit,
and other lengths
• 10 MHz max. Clock Frequency
• Low-Power CMOS Technology:
- Max. write current: 5 mA at 5.5V
- Read current: 5 mA at 5.5V, 10 MHz
- Standby current: 1 A at 2.5V
• 256 x 8-Bit Organization
• Write Page mode (up to 16 bytes)
• Sequential Read
• Self-Timed Erase and Write Cycles (5 ms max.)
• Block Write Protection:
- Protect none, 1/4, 1/2 or all of array
• Built-in Write Protection:
- Power-on/off data protection circuitry
- Write enable latch
- Write-protect pin
• High Reliability:
- Endurance: 1,000,000 erase/write cycles
- Data retention: >200 years
- ESD protection: >4000V
• Temperature Ranges Supported:
- Industrial (I): -40C to +85C
• RoHS Compliant
Package Types (not to scale)
SOT-23
(OT)
SCK
VSS
SI
1
2
3
6 VDD
5 CS
4 SO
SOIC
(SN)
CS 1
SO 2
WP 3
VSS 4
8 VCC
7 HOLD
6 SCK
5 SI
Temp. Ranges
I
Packages
SN, OT
Unique ID Length
32-Bit
Description:
The Microchip Technology Inc. 25AA02UID is a 2 Kbit
Serial Electrically Erasable Programmable Read-Only
Memory (EEPROM) with a preprogrammed, 32-bit
unique ID. The memory is accessed via a simple Serial
Peripheral Interface (SPI) compatible serial bus. The
bus signals required are a clock input (SCK) plus sep-
arate data in (SI) and data out (SO) lines. Access to the
device is controlled through a Chip Select (CS) input.
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused, transi-
tions on its inputs will be ignored, with the exception of
Chip Select, allowing the host to service higher priority
interrupts.
The 25AA02UID is available in the standard 8-lead
SOIC and 6-lead SOT-23 packages.
http://www.DataSheet4U.net/
Pin Function Table
Name
Function
CS
SO
WP
VSS
SI
SCK
HOLD
VCC
Chip Select Input
Serial Data Output
Write-Protect
Ground
Serial Data Input
Serial Clock Input
Hold Input
Supply Voltage
2013 Microchip Technology Inc.
DS20005205A-page 1
datasheet pdf - http://www.DataSheet4U.net/
1 page  
25AA02UID
FIGURE 1-1: HOLD TIMING
CS
16
SCK
SO n + 2
n+1
17
18
n
16 17
19
High-Impedance
n
SI
n+2
n+1
n
Don’t Care
5
n
HOLD
n-1
n-1
FIGURE 1-2: SERIAL INPUT TIMING
CS
2
Mode 1,1
SCK Mode 0,0
5
6
SI MSB in
SO
7
8
http://www.DataSheet4U.net/
High-Impedance
FIGURE 1-3: SERIAL OUTPUT TIMING
CS
SCK
SO
SI
9 10
13
MSB out
Don’t Care
14
4
12
11
3
LSB in
3
15
ISB out
Mode 1,1
Mode 0,0
2013 Microchip Technology Inc.
DS20005205A-page 5
datasheet pdf - http://www.DataSheet4U.net/
5 Page 
25AA02UID
2.6 Write Status Register Instruction
(WRSR)
The Write Status Register instruction (WRSR) allows
the user to write to the nonvolatile bits in the STATUS
register, as shown in Table 2-2. See Figure 2-7 for the
WRSR timing sequence. Four levels of protection for
the array are selectable by writing to the appropriate
bits in the STATUS register. The user has the ability to
write-protect none, one, two, or all four of the
segments of the array as shown in Table 2-3.
TABLE 2-3:
BP1
0
0
1
1
ARRAY PROTECTION
BP0
Array Addresses
Write-Protected
0 none
1 upper 1/4
(C0h-FFh)
0 upper 1/2
(80h-FFh)
1 all
(00h-FFh)
FIGURE 2-7:
WRITE STATUS REGISTER TIMING SEQUENCE (WRSR)
CS
SCK
SI
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Instruction
Data to STATUS register
0 00 00 0 01 7 6 54 3 2 10
SO
High-Impedance
http://www.DataSheet4U.net/
2013 Microchip Technology Inc.
DS20005205A-page 11
datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet 25AA02UID.PDF ] | |
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