DataSheet.es 908E622 Hoja de datos PDF


PDF 908E622 Datasheet ( Hoja de datos )

Número de pieza 908E622
Descripción Triple High-Side and EC Glass Driver
Fabricantes Freescale Semiconductor 
Logotipo Freescale Semiconductor Logotipo
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908E622 datasheet

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908E622 pdf
Terminal Connections
Table 1. Terminal Definitions (continued)
A functional description of each terminal can be found in the Functional Terminal Description section beginning on page 21.
Die Terminal Terminal Name
Formal Name
Definition
Analog
41
HVDD
Switchable VDD
Output
This terminal is a switchable VDD output for driving resistive loads
requiring a regulated 5.0 V supply; e.g. potentiometers.
Analog
42
VDD
Voltage Regulator The +5.0 V voltage regulator output terminal is intended to supply the
Output
embedded microcontroller.
Analog
43
VSS
Voltage Regulator Ground terminal for the connection of all non-power ground connections
Ground
(microcontroller and sensors).
EP
Exposed Pad
Exposed Pad
The exposed pad terminal on the bottom side of the package conducts
heat from the chip to the PCB board.
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Analog Integrated Circuit Device Data
Freescale Semiconductor
908E622
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908E622 arduino
Static Electrical Characteristics
Table 3. Static Electrical Characteristics (continued)
All characteristics are for the analog chip only. Refer to the 68HC908EY16 datasheet for characteristics of the microcontroller
chip. Characteristics noted under conditions 9.0 V VSUP 16 V, -40°C TJ 125°C unless otherwise noted. Typical values
noted reflect the approximate parameter mean at TA = 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max Unit
LIN Physical Layer
LIN Transceiver Output Voltage
Recessive State, TXD HIGH, IOUT = 1.0 µA
Dominant State, TXD LOW, 500 External Pullup Resistor
Normal Mode Pullup Resistor to VSUP
Stop, Sleep Mode Pullup Current Source
Output Current Shutdown Threshold
Output Current Shutdown Timing
Leakage Current to GND
VSUP Disconnected, VBUS at 18V
Recessive state, 8V VSUP 18V, 8V VBUS 18V, VBUS VSUP
GND Disconnected, VGND = VSUP, VBUS at -18V
LIN Receiver
Receiver Threshold Dominant
Receiver Threshold Recessive
Receiver Threshold Center
Receiver Threshold Hysteresis
V LIN_REC
V LIN_DOM
R PU
IPU
IBLIM
IBLS
VSUP -1
20
100
5.0
IBUS
IBUS-PAS-REC
IBUS-NOGND
0.0
-1.0
VBUS_DOM
VBUS_REC
VBUS_CNT
VBUS_HYS
0.6
0.475
30
20
230
1.0
3.0
0.5
V
1.4
47 k
µA
280 mA
40 µs
10
20
1.0
0.4
0.525
0.175
µA
µA
mA
VSUP
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908E622
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Analog Integrated Circuit Device Data
Freescale Semiconductor
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