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PDF M41T00CAP Data sheet ( Hoja de datos )
| Número de pieza | M41T00CAP | |
| Descripción | Serial access real-time clock | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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M41T00CAP
Serial access real-time clock (RTC)
with integral backup battery and crystal
Datasheet − production data
Features
■ Real-time clock (RTC) with backup battery
integrated into package
■ Uses M41T00S enhanced RTC with precision
switchover reference
■ 400 kHz I2C serial interface
■ Automatic switchover and deselect circuitry
with fixed reference voltage
– VCC = 2.7 to 5.5 V operating voltage range
– 2.6 V (typ) power-fail deselect (switchover)
threshold
■ Counters for seconds, minutes, hours, day,
date, month, year and century
■ Software clock calibration
■ Low operating current of 300 µA
■ Oscillator stop detection
■ Battery backup
■ Operating temperature of 0 to 70 °C
■ Self-contained battery and crystal in
CAPHAT™ DIP package
■ RoHS compliant
– Lead-free second level interconnect
www.DataSheet.net/
24
1
PCDIP24 (PC)
Battery/crystal CAPHATTM
March 2012
This is information on a product in full production.
Doc ID 14557 Rev 5
1/27
www.st.com
1
Datasheet pdf - http://www.DataSheet4U.co.kr/
1 page  
M41T00CAP
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
DIP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Serial bus data transfer sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Acknowledgement sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Slave address location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
READ mode sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Alternative READ mode sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
WRITE mode sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Crystal accuracy across temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Clock calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Power down/up mode AC waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Bus timing requirements sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
PCDIP24 – 24-pin plastic DIP, battery CAPHAT™, package outline . . . . . . . . . . . . . . . . . 23
Recycling symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
www.DataSheet.net/
Doc ID 14557 Rev 5
5/27
Datasheet pdf - http://www.DataSheet4U.co.kr/
5 Page 
M41T00CAP
Figure 4. Serial bus data transfer sequence
DATA LINE
STABLE
DATA VALID
CLOCK
Operation
DATA
START
CONDITION
CHANGE OF
DATA ALLOWED
Figure 5. Acknowledgement sequence
SCL FROM
MASTER
START
1
DATA OUTPUT
BY TRANSMITTER
MSB
DATA OUTPUT
BY RECEIVER
2
www.DataSheet.net/
STOP
CONDITION
AI00587
CLOCK PULSE FOR
ACKNOWLEDGEMENT
89
LSB
AI00601
3.7
Note:
READ mode
In this mode the master reads the M41T00CAP slave after setting the slave address (see
Figure 7). Following the WRITE mode control bit (R/W = 0) and the acknowledge bit, the
word address 'An' is written to the on-chip address pointer. Next the START condition and
slave address are repeated followed by the READ mode control bit (R/W = 1). At this point
the master transmitter becomes the master receiver. The data byte which was addressed
will be transmitted and the master receiver will send an acknowledge bit to the slave
transmitter. The address pointer is only incremented on reception of an acknowledge clock.
The M41T00CAP slave transmitter will now place the data byte at address An+1 on the bus,
the master receiver reads and acknowledges the new byte and the address pointer is
incremented to “An+2.”
This cycle of reading consecutive addresses will continue until the master receiver sends a
STOP condition to the slave transmitter.
The system-to-user transfer of clock data will be halted whenever the address being read is
a clock address (00h to 06h). The updating will resume upon a stop condition or when the
pointer increments to any non-clock address (07h).
This is true both in READ mode and WRITE mode.
Doc ID 14557 Rev 5
11/27
Datasheet pdf - http://www.DataSheet4U.co.kr/
11 Page | ||
| Páginas | Total 27 Páginas | |
| PDF Descargar | [ Datasheet M41T00CAP.PDF ] | |
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