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PDF R5F52106ADFM Data sheet ( Hoja de datos )

Número de pieza R5F52106ADFM
Descripción 50-MHz 32-bit RX MCUs
Fabricantes Renesas 
Logotipo Renesas Logotipo



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No Preview Available ! R5F52106ADFM Hoja de datos, Descripción, Manual

Preliminary Data Sheet
Specifications in this document are tentative and subject to change.
RX210 Group
Renesas MCUs
50-MHz 32-bit RX MCUs, 78 DMIPS, up to 512-KB flash memory,
12-bit AD, 10-bit DA, ELC, MPC, RTC, up to 9 comms interfaces;
incorporating functions for IEC60730 compliance
R01DS0041EJ0050
Rev.0.50
Apr 15, 2011
Features
32-bit RX CPU core
Max. operating frequency: 50 MHz
Capable of 78 DMIPS in operation at 50 MHz
Accumulator handles 64-bit results (for a single
instruction) from 32- × 32-bit operations
Multiplication and division unit handles 32- × 32-bit
operations (multiplication instructions take one CPU
clock cycle)
Fast interrupt
CISC Harvard architecture with 5-stage pipeline
Variable-length instructions, ultra-compact code
On-chip debugging circuit
Low-power design and architecture
Operation from a single 1.62- to 5.5-V supply
1.62-V operation available (at up to 20 MHz)
Deep software standby mode with RTC remaining usable
Four low-power modes
On-chip flash memory for code, no wait states
50-MHz operation, 20-ns read cycle
No wait states for reading at full CPU speed
128- to 512-Kbyte capacities
User code programmable via the SCI
Programmable at 1.62 V
For instructions and operands
On-chip data flash memory
Eight Kbytes, reprogrammable up to TBD times
Erasing and programming impose no load on the CPU.
On-chip SRAM, no wait states
20- to 64-Kbyte size capacities
DMA
DMACA: Incorporates four channels
DTC: Four transfer modes
ELC
Module operation can be initiated by event signals
without going through interrupts.
Modules can operate while the CPU is sleeping.
Reset and supply management
Nine types of reset, including the power-on reset (POR)
Low voltage detection (LVD) with voltage settings
Clock functions
Frequency of external clock: Up to 20 MHz
Frequency of the oscillator for sub-clock generation:
32.768 kHz
PLL circuit input: 4 to 12.5 MHz
On-chip low- and high-speed oscillators, dedicated on-
chip low-speed oscillator for the IWDT
Generation of a dedicated 32.768-kHz clock for the RTC
Clock frequency accuracy measurement circuit (CAC)
Real-time clock
Adjustment functions (30 seconds, leap year, and error)
Time capture function
Time capture on event-signal input through external pins
RTC capable of initiating return from deep software
standby mode
PLQP0100KB-A 14 × 14 mm, 0.5-mm pitch
PLQP0080KB-A 12 × 12 mm, 0.5-mm pitch
PLQP0080JA-A 14 × 14 mm, 0.65-mm pitch
PLQP0064KB-A 10 × 10 mm, 0.5-mm pitch
PLQP0064GA-A 14 × 14 mm, 0.8-mm pitch
PTLG0100JA-A 7 × 7 mm, 0.65-mm pitch
Independent watchdog timer
125-kHz on-chip low-speed oscillator produces a
dedicated clock signal to drive IWDT operation.
Useful functions for IEC60730 compliance
Self-diagnostic and disconnection-detection functions for
the AD converter, clock-frequency accuracy-
measurement circuit, independent watchdog timer,
functions to assist in RAM testing, etc.
Up to nine communications interfaces
SCI with many useful functions (up to seven interfaces)
Asynchronous mode, clock synchronous mode, smart
card interface
I2C bus interface: Transfer at up to 1 Mbps, capable of
SMBus operation (1 interface)
RSPI (1)
External address spacewww.DataSheet.co.kr
Four CS areas (4 × 16 Mbytes)
8- or 16-bit bus space is selectable per area
Up to 14 extended-function timers
16-bit MTU2: input capture, output capture,
complementary PWM output, phase counting mode (6
channels)
8-bit TMR (4 channels)
16-bit compare-match timers (4 channels)
12-bit A/D converter
Capable of conversion within 1 μs
Sample-and-hold circuits (for three channels)
Three-channel synchronized sampling available
Self-diagnostic function and analog input disconnection
detection assistance function
10-bit D/A converter
Analog comparator
Programmable I/O ports
5-V tolerant, open drain, input pull-up, switching of
driving ability
MPC
Multiple locations are selectable for I/O pins of
peripheral functions
Temperature sensor
Operating temp. range
-40 C to +85C
R01DS0041EJ0050 Rev.0.50
Apr 15, 2011
Page 1 of 90
Datasheet pdf - http://www.DataSheet4U.net/

1 page




R5F52106ADFM pdf
Under development Preliminary document
Specifications in this document are tentative and subject to change.
RX210 Group
1. Overview
Table 1.2
Comparison of Functions for Different Packages
Module/Functions
External bus
CS areas: 4 (CS0 to CS3)
Interrupt
External interrupts
DMA
DMA controller (DMAC)
Data transfer controller (DTC)
Timers
Multi-function timer pulse unit 2 (MTU2)
Port output enable 2 (POE2)
8-bit timer (TMR)
Compare match timer (CMT)
Realtime clock (RTC)
Watchdog timer (WDT)
Independent watchdog timer (IWDT)
Communication Serial communications interface (SCIc)
function
Serial communications interface (SCId)
I2C bus interface (RIIC)
Serial peripheral interface (RSPI)
12-bit A/D converter
Temperature sensor
D/A converter
CRC calculator (CRC)
Event link controller (ELC)
Comparator A
Comparator B
Package
RX210 Group
100 Pins
80 Pins
64 Pins
Supported
Not supported
Not supported
NMI, IRQ0 to IRQ7
4 channels (DMAC0 to DMAC3)
Supported
6 channels (MTU0 to MTU5)
POE0# to POE3#, POE8#
2 channels × 2 units
2 channels × 2 units
Supported
Supported
Supported
6 channels
(SCI0, 1, 5, 6, 8, 9)
5 channels
(SCI1, 5, 6, 8, 9)
1 channel (SCI12)
1 channel
1 channel
16 channels
(AN000 to AN015)
14 channels
(AN000 to AN013)
12 channels
(AN000 to AN004,
AN006, AN008 to
AN013)
Supported
2 channels
www.DataSheet.co.kr
Supported
Supported
2 channels
2 channels
100-pin TFLGA
100-pin LQFP
80-pin LQFP
64-pin LQFP
R01DS0041EJ0050 Rev.0.50
Apr 15, 2011
Page 5 of 90
Datasheet pdf - http://www.DataSheet4U.net/

5 Page





R5F52106ADFM arduino
Under development Preliminary document
Specifications in this document are tentative and subject to change.
RX210 Group
1. Overview
Table 1.4
Pin Functions (3 / 4)
Classifications
Pin Name
I/O Description
Serial
communications
interface (SCId)
Asynchronous mode/clock synchronous mode
SCK12
I/O Input/output pin for the clock signal
RXD12
Input
Input pin for received data
TXD12
Output Output pin for transmitted data
CTS12#
Input
Input pin for controlling the start of transmission and reception
RTS12#
Output Output pin for controlling the start of transmission and reception
Simple I2C mode
SSCL12
I/O Input/output pin for the I2C clock
SSDA12
I/O Input/output pin for the I2C data
Simple SPI mode
SCK12
I/O Input/output pin for the clock
SMISO12
I/O Input/output pin for slave transmit data
SMOSI12
I/O Input/output pin for master transmit data
SS12#
Input
Chip-select input pin
Extended serial mode
RXDX12
Input
Input pin for data reception by SCId
TXDX12
Output Output pin for data transmission by SCId
SIOX12
I/O Input/output pin for data reception or transmission by SCId
I2C bus interface
(RIIC)
SCL
I/O Input/output pin for I2C bus interface clocks. Bus can be directly
driven by the NMOS open drain output.
SDA
I/O Input/output pin for I2C bus interface data. Bus can be directly
driven by the NMOS open drain output.
Serial peripheral
interface (RSPI)
RSPCKA
MOSIA
I/O Clock input/output pin for the RSPI.
www.DataSheet.co.kr
I/O Input or output data output from the master for the RSPI.
MISOA
I/O Input or output data output from the slave for the RSPI.
SSLA0
I/O Input/output pin to select the slave for the RSPI.
SSLA1 to SSLA3
Output Output pins to select the slave for the RSPI.
12-bit A/D converter AN000 to AN015
Input
Input pin for the analog signals to be processed by the A/D
converter.
ADTRG0#
Input
Input pin for the external trigger signals that start the A/D
conversion.
D/A converter
DA0, DA1
Output
Output pins for the analog signals to be processed by the D/A
converter.
Comparator A
CMPA1
Input
Input pin for the comparator A1 analog signals.
CMPA2
Input
Input pin for the comparator A2 analog signals.
CVREFA
Input
Input pin for the comparator reference voltage.
Comparator B
CMPB0
Input
Input pin for the comparator B0 analog signals.
CVREFB0
Input
Input pin for the comparator B0 reference voltage.
CMPB1
Input
Input pin for the comparator B1 analog signals.
CVREFB1
Input
Input pin for the comparator B1 reference voltage.
R01DS0041EJ0050 Rev.0.50
Apr 15, 2011
Page 11 of 90
Datasheet pdf - http://www.DataSheet4U.net/

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