PDF TDA8933 Data sheet ( Hoja de datos )

Número de pieza	TDA8933
Descripción	Class-D audio amplifier
Fabricantes	NXP Semiconductors
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No Preview Available ! TDA8933 Class-D audio ampliﬁer Rev. 01 — 15 May 2007 Preliminary data sheet 1. General description The TDA8933 is a high efﬁciency class-D ampliﬁer with low power dissipation. The continuous time output power is 2 × 10 W in a stereo half bridge application (RL = 8 Ω) or 1 × 20 W in a mono full bridge application (RL =16 Ω). Due to the low power dissipation the device can be used without any external heat sink when playing music. Due to the implementation of Thermal Foldback (TF), even for high supply voltages and/or lower load impedances, the device will continue to operate with considerable music output power without the need for an external heat sink. The device has two full differential inputs driving two independent outputs. It can be used in a mono full bridge conﬁguration (Bridge-Tied Load (BTL)) or a stereo half bridge conﬁguration (Single-Ended (SE)). 2. Features I High efﬁciency I Application without heat sink using thermally enhanced small outline package I Operating voltage from 10 V to 36 V asymmetrical or ± 5 V to ± 18 V symmetrical I Thermally protected I Thermal foldback www.DataSheet.co.kr I Current limiting to avoid audio holes I Full short circuit proof to supply lines (using advanced current protection) I Switchable internal / external oscillator (master-slave setting) I No pop noise I Low power dissipation I Mono bridge-tied load (full bridge) or stereo single-ended (half bridge) application I Full differential inputs 3. Applications I Flat panel television sets I Flat panel monitor sets I Multimedia systems I Wireless speakers I Mini/micro systems I Home sound sets Datasheet pdf - http://www.DataSheet4U.net/ 1 page NXP Semiconductors 7. Pinning information 7.1 Pinning TDA8933 Class-D audio ampliﬁer VSSD(HW) 1 IN1P 2 IN1N 3 DIAG 4 ENGAGE 5 POWER UP 6 CGND 7 VDDA 8 VSSA 9 OSCREF 10 HVPREF 11 INREF 12 TEST 13 IN2N 14 IN2P 15 VSSD(HW) 16 Fig 2. Pin conﬁguration diagram TDA8933T SO32 32 VSSD(HW) 31 OSCIO 30 HVP1 29 VDDP1 28 BOOT1 27 OUT1 26 VSSP1 25 STAB1 24 STAB2 23 VSSP2 22 OUT2 21 BOOT2 20 VDDP2 19 HVP2 18 DREF 17 VSSD(HW) 010aaa114 7.2 Pin description www.DataSheet.co.kr Table 3. Pinning description Symbol Pin Description VSSD(HW) IN1P 1 2 negative digital supply voltage and handle wafer connection positive audio input for channel 1 IN1N 3 negative audio input for channel 1 DIAG 4 diagnostic output; open-drain ENGAGE 5 engage input to switch between Mute mode and Operating mode POWERUP 6 power-up input to switch between Sleep mode and Mute mode CGND 7 control ground; reference for POWERUP, ENGAGE and DIAG VDDA VSSA OSCREF 8 9 10 positive analog supply voltage negative analog supply voltage input internal oscillator setting (only master setting) HVPREF 11 decoupling of internal half supply voltage reference INREF 12 decoupling for input reference voltage TEST 13 test signal input; for testing purpose only IN2N 14 negative audio input for channel 2 IN2P 15 positive audio input for channel 2 VSSD(HW) VSSD(HW) DREF 16 17 18 negative digital supply voltage and handle wafer connection negative digital supply voltage and handle wafer connection decoupling of internal (reference) 5 V regulator for logic supply TDA8933_1 Preliminary data sheet Rev. 01 — 15 May 2007 © NXP B.V. 2007. All rights reserved. 5 of 47 Datasheet pdf - http://www.DataSheet4U.net/ 5 Page NXP Semiconductors TDA8933 Class-D audio ampliﬁer If the supply voltage exceeds 36 V, the OVP circuit is activated and the power stages will shut down. It is re-enabled as soon as the supply voltage drops below the threshold level. The system is restarted again after 100 ms. It should be noted that supply voltages > 40 V may damage the TDA8933. Two conditions should be distinguished: • If the supply voltage is pumped to higher values by the TDA8933 application itself (see also Section 14.8), the OVP is triggered and the TDA8933 is shut down. The supply voltage will decrease and the TDA8933 is protected against any overstress. • If a supply voltage > 40 V is caused by other or external causes, the TDA8933 will shut down, but the device can still be damaged since the supply voltage will remain > 40 V in this case. The OVP protection is not a supply clamp. An additional UBP circuit compares the positive analog supply voltage (VDDA) and the negative analog supply voltage (VSSA) and is triggered if the voltage difference between them exceeds a certain level. This level depends on the sum of both supply voltages. The unbalance threshold levels can be deﬁned as follows: • LOW-level threshold: VP(th)(ubp)l < 8/5 × VHVPREF • HIGH-level threshold: VP(th)(ubp)h > 8/3 × VHVPREF In a symmetrical supply the UBP is released when the unbalance of the supply voltage is within 6 % of its starting value. Table 6 shows an overview of all protections and the effect on the output signal. Table 6. www.DataSheet.co.kr Overview of protections for the TDA8933 Protection Restart When fault is removed Every 100 ms OTP no yes OCP yes no WP yes no UVP no yes OVP no yes UBP no yes TDA8933_1 Preliminary data sheet Rev. 01 — 15 May 2007 © NXP B.V. 2007. All rights reserved. 11 of 47 Datasheet pdf - http://www.DataSheet4U.net/ 11 Page

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