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PDF IDT82P2521 Data sheet ( Hoja de datos )

Número de pieza IDT82P2521
Descripción High-Density E1 Line Interface Unit
Fabricantes IDT 
Logotipo IDT Logotipo



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21(+1) Channel
High-Density E1
Line Interface Unitwww.DataSheet.co.kr
IDT82P2521
Version 1
December 7, 2005
6024 Silver Creek Valley Road, San Jose, California 95138
Telephone: 1-800-345-7015 or 408-284-8200• TWX: 910-338-2070 • FAX: 408-284-2775
Printed in U.S.A.
© 2005 Integrated Device Technology, Inc.
Datasheet pdf - http://www.DataSheet4U.net/

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IDT82P2521 pdf
IDT82P2521
21(+1) CHANNEL HIGH-DENSITY E1 LINE INTERFACE UNIT
4.2 MICROPROCESSOR INTERFACE ......................................................................................................................... 69
4.3 POWER UP .............................................................................................................................................................. 70
4.4 HITLESS PROTECTION SWITCHING (HPS) SUMMARY ...................................................................................... 70
5 PROGRAMMING INFORMATION ................................................................................................................................... 73
5.1 REGISTER MAP ...................................................................................................................................................... 73
5.1.1 Global Register ........................................................................................................................................... 73
5.1.2 Per-Channel Register ................................................................................................................................. 74
5.2 REGISTER DESCRIPTION ..................................................................................................................................... 77
5.2.1 Global Register ........................................................................................................................................... 77
5.2.2 Per-Channel Register ................................................................................................................................. 85
6 JTAG ............................................................................................................................................................................. 117
6.1 JTAG INSTRUCTION REGISTER (IR) .................................................................................................................. 117
6.2 JTAG DATA REGISTER ........................................................................................................................................ 117
6.2.1 Device Identification Register (IDR) .......................................................................................................... 117
6.2.2 Bypass Register (BYP) ............................................................................................................................. 117
6.2.3 Boundary Scan Register (BSR) ................................................................................................................ 117
6.3 TEST ACCESS PORT (TAP) CONTROLLER ....................................................................................................... 117
7 THERMAL MANAGEMENT .......................................................................................................................................... 119
7.1 JUNCTION TEMPERATURE ................................................................................................................................. 119
7.2 EXAMPLE OF JUNCTION TEMPERATURE CALCULATION ............................................................................... 119
7.3 HEATSINK EVALUATION ..................................................................................................................................... 119
8 PHYSICAL AND ELECTRICAL SPECIFICATIONS ..................................................................................................... 120
8.1 ABSOLUTE MAXIMUM RATINGS ..................................www..Data.Shee.t.co.kr.................................................................................... 120
8.2 RECOMMENDED OPERATING CONDITIONS .................................................................................................... 121
8.3 DEVICE POWER CONSUMPTION AND DISSIPATION (TYPICAL) 1 ................................................................. 122
8.4 DEVICE POWER CONSUMPTION AND DISSIPATION (MAXIMUM) 1 ............................................................... 123
8.5 D.C. CHARACTERISTICS ..................................................................................................................................... 124
8.6 E1 RECEIVER ELECTRICAL CHARACTERISTICS ............................................................................................. 125
8.7 E1 TRANSMITTER ELECTRICAL CHARACTERISTICS ...................................................................................... 126
8.8 TRANSMITTER AND RECEIVER TIMING CHARACTERISTICS ......................................................................... 127
8.9 CLKE1 TIMING CHARACTERISTICS ................................................................................................................... 129
8.10 JITTER ATTENUATION CHARACTERISTICS ...................................................................................................... 129
8.11 MICROPROCESSOR INTERFACE TIMING ......................................................................................................... 132
8.11.1 Serial Microprocessor Interface ................................................................................................................ 132
8.11.2 Parallel Motorola Non-Multiplexed Microprocessor Interface ................................................................... 134
8.11.2.1 Read Cycle Specification .......................................................................................................... 134
8.11.2.2 Write Cycle Specification .......................................................................................................... 135
8.11.3 Parallel Intel Non-Multiplexed Microprocessor Interface ........................................................................... 136
8.11.3.1 Read Cycle Specification .......................................................................................................... 136
8.11.3.2 Write Cycle Specification .......................................................................................................... 137
8.11.4 Parallel Motorola Multiplexed Microprocessor Interface ........................................................................... 138
8.11.4.1 Read Cycle Specification .......................................................................................................... 138
8.11.4.2 Write Cycle Specification .......................................................................................................... 139
Table of Contents
5 December 7, 2005
Datasheet pdf - http://www.DataSheet4U.net/

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IDT82P2521 arduino
IDT82P2521
21(+1) CHANNEL HIGH-DENSITY E1 LINE INTERFACE UNIT
APPLICATIONS
! SDH/SONET multiplexers
! Central office or PBX (Private Branch Exchange)
! Digital access cross connects
! Remote wireless modules
! Microwave transmission systems
DESCRIPTION
The IDT82P2521 is a 21+1 channels high-density E1 short haul Line
Interface Unit. Each channel of the IDT82P2521 can be independently
configured. The configuration is performed through a Serial or Parallel
Intel/Motorola Non-Multiplexed /Multiplexed microprocessor interface.
In the receive path, through a Single Ended or Differential line inter-
face, the received signal is processed by an adaptive Equalizer and then
sent to a Slicer. Clock and data are recovered from the digital pulses
output from the Slicer. After passing through an enabled or disabled
Receive Jitter Attenuator, the recovered data is decoded using AMI/
HDB3 line code rule in Single Rail NRZ Format mode and output to the
system, or output to the system without decoding in Dual Rail NRZ
Format mode and Dual Rail RZ Format mode.
In the transmit path, the data to be transmitted is input on TDn in
Single Rail NRZ Format mode or TDPn/TDNn in Dual Rail NRZ Format
mode and Dual Rail RZ Format mode, and is sampled by a transmit
reference clock. The clock can be supplied externally from TCLKn or
recovered from the input transmit data by an internal Clock Recovery. A
selectable JA in Tx path is used to de-jitter gapped clocks. To meet E1
waveform standards, two E1 templates, as well as an arbitrary waveform
generator are provided. The data through the Waveform Shaper, the
Line Driver and the Tx Transmitter is output on TTIPn and TRINGn.
Alarms (including LOS, AIS) and defects (including BPV, EXZ) are
detected in both receive line side and transmit system side. AIS alarm,
PRBS, ARB and IB patterns can be generated /detected in receive /
transmit direction for testing purpose. Analog Loopback, Digital Loop-
back and Remote Loopback are all integrated for diagnostics.
Channel 0 is a special channel. Besides normal operation as the
other 21 channels, channel 0 also supports G.772 Monitoring and Jitter
Measurement per ITU O.171.
A line monitor function per T1.102 is available to provide a Non-Intru-
sive Monitoring of channels of other devices.
JTAG per IEEE 1149.1 is also supported by the IDT82P2521.
www.DataSheet.co.kr
Applications
11
December 7, 2005
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