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PDF FM25e64 Data sheet ( Hoja de datos )

Número de pieza FM25e64
Descripción 64Kb Serial Low Energy F-RAM Memory
Fabricantes Ramtron International 
Logotipo Ramtron International Logotipo



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No Preview Available ! FM25e64 Hoja de datos, Descripción, Manual

Preliminary
FM25e64
64Kb Serial Low Energy F-RAM Memory
FEATURES
64K bit Ferroelectric Nonvolatile RAM
Organized as 8,192 x 8 bits
High Endurance 1 Trillion (1012) Read/Writes
36 Year Data Retention at +75ºC
NoDelay™ Writes
Advanced High-Reliability Ferroelectric Process
Fast SPI Interface
Up to 20 MHz Frequency
SPI Mode 0 & 3 (CPOL, CPHA=0,0 & 1,1)
Software Write-Protection (BP bits)
Hardware Write-Protect (/WP pin)
Active-Low RESET Input
Holds Device in Reset State While Power
Supply Stabilizes
Reduces Time to First F-RAM Access
Allows Freedom of Power Supply Ramp Rates
Low Voltage/ Low Energy Consumption
VDD = 1.8V ±0.1V (-1 version)
VDD = 1.5V +0.15V, -0.1V (-2 version)
20 A (typ.) Active Current at 1 MHz
0.1 A (typ.) Standby Current
Industry Standard Configuration
Industrial Temperature -40C to +85C
8-pin “Green”/RoHS SOIC Package
DESCRIPTION
The FM25e64 is a low voltage, low energy 64-kilobit
nonvolatile memory employing an advanced F-RAM
process. It provides reliable data retention for 36
years while eliminating the complexities, overhead,
and system level reliability problems caused by
EEPROM and other nonvolatile memories.
The FM25e64 performs write operations at bus
speed. No write delays are incurred. Data is written to
the memory array immediately after each byte has
been successfully transferred to the device. The next
bus cycle may commence immediately without the
need for data polling. In addition, the product offers
substantial write endurance compared with other
nonvolatile memories. The FM25e64 is capable of
supporting 1012 read/write cycles, or amillion times
more write cycles than EEPROM.
These capabilities make the FM25e64 ideal for
nonvolatile memory applications requiring frequent
or rapid writes. Examples range from data collection,
where the number of write cycles may be critical, to
demanding industrial controls where the long write
time of EEPROM can cause data loss.
The FM25e64 provides substantial benefits to users
of serial EEPROM as a hardware drop-in
replacement. The FM25e64 uses the high-speed SPI
bus, which enhances the high-speed write capability
of F-RAM technology. Device specifications are
guaranteed over an industrial temperature range of
-40°C to +85°C.
PIN CONFIGURATION
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CS
SO
WP
VSS
1
2
3
4
8 VDD
7 RST
6 SCK
5 SI
Pin Name
/CS
SCK
SI
SO
/RST
/WP
VDD
VSS
Function
Chip Select
Serial Clock
Serial Data Input
Serial Data Output
Reset Input
Write Protect Input
Supply Voltage
Ground
This is a product that has fixed target specifications but are subject
to change pending characterization results.
Rev. 1.0
Mar. 2012
Ramtron International Corporation
1850 Ramtron Drive, Colorado Springs, CO 80921
(800) 545-FRAM, (719) 481-7000
http://www.ramtron.com
Page 1 of 14
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FM25e64 pdf
SPI Mode 0: CPOL=0, CPHA=0
FM25e64 - 64Kb 1.5V & 1.8V SPI F-RAM
7 65 4 32 1 0
SPI Mode 3: CPOL=1, CPHA=1
7 65 4 32 1 0
Figure 4. SPI Modes 0 & 3
Power Up to First Access
The FM25e64 is not accessible for a period of time (tPU) after power up. Users must comply with the timing
parameter tPU, which is the minimum time from /RST deasserted to the first /CS low.
Data Transfer
All data transfers to and from the FM25e64 occur in 8-bitwww.DataSheet.co.kr groups. They are synchronized to the clock signal
(SCK), and they transfer most significant bit (MSB) first. Serial inputs are registered on the rising edge of SCK.
Outputs are driven from the falling edge of SCK.
Command Structure
There are six commands called op-codes that can be issued by the bus master to the FM25e64. They are listed in
the table below. These op-codes control the functions performed by the memory. They can be divided into three
categories. First, there are commands that have no subsequent operations. They perform a single function such as
to enable a write operation. Second are commands followed by one byte, either in or out. They operate on the
Status Register. The third group includes commands for memory transactions followed by address and one or
more bytes of data.
Table 1. Op-code Commands
Name Description
WREN Set Write Enable Latch
WRDI Write Disable
RDSR Read Status Register
WRSR Write Status Register
READ Read Memory Data
WRITE Write Memory Data
Op-code
0000 0110b
0000 0100b
0000 0101b
0000 0001b
0000 0011b
0000 0010b
WREN Set Write Enable Latch
The FM25e64 will power up with writes disabled. The WREN command must be issued prior to any write
operation. Sending the WREN op-code will allow the user to issue subsequent op-codes for write operations.
These include writing the Status Register (WRSR) and writing the memory (WRITE).
Rev. 1.0
Mar. 2012
Page 5 of 14
Datasheet pdf - http://www.DataSheet4U.net/

5 Page





FM25e64 arduino
FM25e64 - 64Kb 1.5V & 1.8V SPI F-RAM
AC Parameters (TA = -40C to + 85C, CL = 30pF, unless otherwise specified)
Symbol
Parameter
Min Max
fCK SCK Clock Frequency
tCH Clock High Time
tCL Clock Low Time
tCSU Chip Select Setup
tCSH Chip Select Hold
tOD Output Disable Time
tODV Output Data Valid Time
tOH Output Hold Time
tD Deselect Time
tR Data In Rise Time
tF Data In Fall Time
tSU Data Setup Time
tH Data Hold Time
0 20
22
22
10
10
20
20
0
60
50
50
5
5
Notes
1. tCH + tCL = 1/fCK.
2. Characterized but not 100% tested in production.
3. Rise and fall times measured between 10% and 90% of waveform.
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
1
1
2
2,3
2,3
Capacitance (TA = 25C, f=1.0 MHz, VDD = 1.6V)
Symbol Parameter
CO Output Capacitance (SO)
CI Input Capacitance
Notes
1. This parameter is periodically sampled and not 100% tested.
Min
Max
Units Notes
- 8 pF 1
- 6 pF 1
AC Test Conditions
Input Pulse Levels
Input rise and fall times
Input and output timing levels
Output Load Capacitance
10% and 90% of VDD
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5 ns
0.5 VDD
30 pF
Data Retention
Symbol
Parameter
TDR @ +85ºC
@ +80ºC
@ +75ºC
Min
Max
Units
Notes
10 - Years
18 - Years
36 - Years
Rev. 1.0
Mar. 2012
Page 11 of 14
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