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PDF IDT8N3Q001 Data sheet ( Hoja de datos )
| Número de pieza | IDT8N3Q001 | |
| Descripción | Quad-Frequency Programmable XO | |
| Fabricantes | IDT | |
| Logotipo |  |
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Quad-Frequency Programmable XO IDT8N3Q001 REV G
DATA SHEET
General Description
The IDT8N3Q001 is a Quad-Frequency Programmable Clock
Oscillator with very flexible frequency programming capabilities. The
device uses IDT’s fourth generation FemtoClock® NG technology for
an optimum of high clock frequency and low phase noise
performance. The device accepts 2.5V or 3.3V supply and is
packaged in a small, lead-free (RoHS 6) 10-lead Ceramic 5mm x
7mm x 1.55mm package.
Besides the four default power-up frequencies set by the FSEL0 and
FSEL1 pins, the IDT8N3Q001 can be programmed via the I2C
interface to output clock frequencies between 15.476MHz to
866.67MHz and from 975MHz to 1,300MHz to a very high degree of
precision with a frequency step size of 435.9Hz ÷ N (N is the PLL
output divider). Since the FSEL0 and FSEL1 pins are mapped to 4
independent PLL M and N divider registers (P, MINT, MFRAC and N),
reprogramming those registers to other frequencies under control of
FSEL0 and FSEL1 is supported. The extended temperature range
supports wireless infrastructure, telecommunication and networking
end equipment requirements.
Features
• Fourth generation FemtoClock® NG technology
• Programmable clock output frequency from 15.476MHz to
866.67MHz and from 975MHz to 1,300MHz
• Four power-up default frequencies (see part number order
codes), re-programmable by I2C
• I2C programming interface for the output clock frequency and
internal PLL control registers
• Frequency programming resolution is 435.9Hz ÷N
• One 2.5V, 3.3V LVPECL clock output
• Two control inputs for the power-up default frequency
• LVCMOS/LVTTL compatible control inputs
• RMS phase jitter @ 156.25MHz (12kHz - 20MHz): 0.244ps
(typical), integer PLL feedback configuration
• RMS phase jitter @ 156.25MHz (1kHz - 40MHz): 0.265ps
(typical), integer PLL feedback configuration
• Full 2.5V or 3.3V supply modes
• -40°C to 85°C ambient operating temperature
• Available in Lead-free (RoHS 6) package
www.DataSheet.co.kr
Block Diagram
OSC ÷P
fXTAL
2
FSEL1
FSEL0
SCLK
SDATA
OE
Pulldown
Pulldown
Pullup
Pullup
Pullup
PFD FemtoClock® NG
&
VCO
÷N
LPF 1950-2600MHz
÷MINT, MFRAC
25
Configuration Register (ROM)
(Frequency, APR, Polarity)
7
I2C Control
Pin Assignment
Q
nQ
DNU 1
8 VCC
OE 2
7 nQ
VEE 3
6Q
IDT8N3Q001
10-lead Ceramic 5mm x 7mm x 1.55mm
package body
CD Package
Top View
IDT8N3Q001GCD REVISION A MARCH 6, 2012
1
©2012 Integrated Device Technology, Inc.
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
IDT8N3Q001 REV G Data Sheet
QUAD-FREQUENCY PROGRAMMABLE-XO
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, VCC
Inputs, VI
Outputs, IO (SDATA)
Outputs, IO (LVPECL)
Continuous Current
Surge Current
Package Thermal Impedance, JA
Storage Temperature, TSTG
Rating
3.63V
-0.5V to VCC + 0.5V
10mA
50mA
100mA
49.4C/W (0 mps)
-65C to 150C
DC Electrical Characteristics
Table 5A. Power Supply DC Characteristics,VCC = 3.3V ± 5%, VEE = 0V, TA = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum
Typical
Maximum
VCC Power Supply Voltage
IEE Power Supply Current
3.135 3.3 3.465
140
Units
V
mA
Table 5B. Power Supply DC Characteristics, VCC = 2.5V ± 5%, VEE = 0V, TA = -40°C to 85°C
www.DataSheet.co.kr
Symbol Parameter
Test Conditions
Minimum
Typical
VCC Supply Voltage
IEE Power Supply Current
2.375
2.5
Maximum
2.625
136
Units
V
mA
Table 5C. LVCMOS/LVTTL DC Characteristic, VCC = 3.3V ± 5% or 2.5V ± 5%, VEE = 0V, TA = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
VIH
Input High
Voltage
FSEL[1:0], OE
FSEL[1:0], OE
VCC =3.3V +5%
VCC =2.5V +5%
1.7
1.7
FSEL[1:0]
VCC =3.3V +5%
-0.3
VIL
Input Low
Voltage
OE
FSEL[1:0]
VCC =3.3V +5%
VCC =2.5V +5%
-0.3
-0.3
OE
VCC =2.5V +5%
-0.3
OE VCC = VIN = 3.465V or 2.625V
IIH
Input
High Current
SDATA, SCLK
VCC = VIN = 3.465V or 2.625V
FSEL0, FSEL1
VCC = VIN = 3.465V or 2.625V
OE
VCC = 3.465V or 2.625V, VIN = 0V
-500
IIL
Input
Low Current
SDATA, SCLK
VCC = 3.465V or 2.625V, VIN = 0V
-150
FSEL0, FSEL1
VCC = 3.465V or 2.625V, VIN = 0V
-5
VCC +0.3
VCC +0.3
0.5
0.8
0.5
0.8
10
5
150
Units
V
V
V
V
V
V
µA
µA
µA
µA
µA
µA
IDT8N3Q001GCD REVISION A MARCH 6, 2012
5
©2012 Integrated Device Technology, Inc.
Datasheet pdf - http://www.DataSheet4U.net/
5 Page 
IDT8N3Q001 REV G Data Sheet
QUAD-FREQUENCY PROGRAMMABLE-XO
Termination for 3.3V LVPECL Outputs
The clock layout topology shown below is a typical termination for
LVPECL outputs. The two different layouts mentioned are
recommended only as guidelines.
The differential outputs are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminating
resistors (DC current path to ground) or current sources must be
used for functionality. These outputs are designed to drive 50
transmission lines. Matched impedance techniques should be used
to maximize operating frequency and minimize signal distortion.
Figures 1A and 1B show two different layouts which are
recommended only as guidelines. Other suitable clock layouts may
exist and it would be recommended that the board designers
simulate to guarantee compatibility across all printed circuit and clock
component process variations.
3.3V
Zo = 50Ω
3.3V
+
LVPECL
Zo = 50Ω
R1
50Ω
RTT =
1
((VOH + VOL) / (VCC – 2)) – 2
* Zo
_
Input
R2
50Ω
VCC - 2V
RTT
Figure 1A. 3.3V LVPECL Output Termination
3.3V
LVPECL
3.3V
R3 R4
125Ω
125Ω
3.3V
Zo = 50Ω
+
Zo = 50Ω
R1
84Ω
_
R2
84Ω
Input
Figure 1B. 3.3V LVPECL Output Termination
www.DataSheet.co.kr
IDT8N3Q001GCD REVISION A MARCH 6, 2012
11
©2012 Integrated Device Technology, Inc.
Datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet IDT8N3Q001.PDF ] | |
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