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PDF K30P100M100SF2 Data sheet ( Hoja de datos )

Número de pieza K30P100M100SF2
Descripción K30 Sub-Family
Fabricantes Freescale Semiconductor 
Logotipo Freescale Semiconductor Logotipo



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Freescale Semiconductor
Data Sheet: Product Preview
K30 Sub-Family Data Sheet
Supports the following:
MK30N512VLL100
Features
Operating Characteristics
– Voltage range: 1.71 to 3.6 V
– Flash write voltage range: 1.71 to 3.6 V
– Temperature range (ambient): -40 to 105°C
Performance
– Up to 100 MHz ARM Cortex-M4 core with DSP
instructions delivering 1.25 Dhrystone MIPS per
MHz
Memories and memory interfaces
– Up to 512 KB program flash memory on non-
FlexMemory devices
– Up to 128 KB RAM
– Serial programming interface (EzPort)
Clocks
– 3 to 32 MHz crystal oscillator
– 32 kHz crystal oscillator
– Multi-purpose clock generator
System peripherals
– 10 low-power modes to provide power optimization
based on application requirements
– Memory protection unit with multi-master
protection
– 16-channel DMA controller, supporting up to 64
request sources
– External watchdog monitor
– Software watchdog
– Low-leakage wakeup unit
Security and integrity modules
– Hardware CRC module to support fast cyclic
redundancy checks
– 128-bit unique identification (ID) number per chip
Document Number: K30P100M100SF2
Rev. 4, 3/2011
K30P100M100SF2
Human-machine interface
– Segment LCD controller supporting up to 40
frontplanes and 8 backplanes, or 44 frontplanes and
4 backplanes
– Low-power hardware touch sensor interface (TSI)
– General-purpose input/output
Analog modules
– Two 16-bit SAR ADCs
– Programmable gain amplifier (up to x64) integrated
into each ADC
– 12-bit DAC
– Three analog comparators (CMP) containing a 6-bit
DAC and programmable reference input
– Voltage reference
Timers
– Programmable delay block
– Eight-channel motor control/general purpose/PWM
timer
– Two 2-channel quadrature decoder/general purpose
timers
– Periodic interrupt timers
– 16-bit low-power timer
– Carrier modulator transmitter
– Real-time clock
Communication interfaces
– Two Controller Area Network (CAN) modules
– Three SPI modules
– Two I2C modules
– Five UART modules
– Secure Digital host controller (SDHC)
– I2S module
This document contains information on a product under development. Freescale
reserves the right to change or discontinue this product without notice.
© 2010–2011 Freescale Semiconductor, Inc.
Preliminary
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K30P100M100SF2 pdf
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Terminology and guidelines
3.1.1 Example
This is an example of an operating requirement, which you must meet for the
accompanying operating behaviors to be guaranteed:
Symbol
VDD
Description
Min.
1.0 V core supply
voltage
0.9
Max.
1.1
Unit
V
3.2 Definition: Operating behavior
An operating behavior is a specified value or range of values for a technical
characteristic that are guaranteed during operation if you meet the operating requirements
and any other specified conditions.
3.2.1 Example
This is an example of an operating behavior, which is guaranteed if you meet the
accompanying operating requirements:
Symbol
IWP
Description
Digital I/O weak pullup/ 10
pulldown current
Min.
Max.
130
Unit
µA
3.3 Definition: Attribute
An attribute is a specified value or range of values for a technical characteristic that are
guaranteed, regardless of whether you meet the operating requirements.
3.3.1 Example
This is an example of an attribute:
Symbol
CIN_D
Description
Input capacitance:
digital pins
Min.
Max.
7
Unit
pF
K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Freescale Semiconductor, Inc.
Preliminary
5
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K30P100M100SF2 arduino
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General
1. All functional non-supply pins are internally clamped to VSS, and induce an injection current when VIN is less than VSS. The
IIC maximum operating requirement should not be exceeded. If this requirement cannot be met, the input must be current
limited to the value specified.
5.1.2 LVD and POR operating requirements
Table 2. VDD supply LVD and POR operating requirements
Symbol Description
Min.
Typ.
Max.
Unit
VPOR
VLVDH
Falling VDD POR detect voltage
Falling low-voltage detect threshold — high
range (LVDV=01)
TBD 1.1 TBD
TBD 2.56 TBD
V
V
VLVW1H
VLVW2H
VLVW3H
VLVW4H
Low-voltage warning thresholds — high range
• Level 1 falling (LVWV=00)
• Level 2 falling (LVWV=01)
• Level 3 falling (LVWV=10)
• Level 4 falling (LVWV=11)
TBD
TBD
TBD
TBD
2.70
2.80
2.90
3.00
TBD
TBD
TBD
TBD
V
V
V
V
VHYSH Low-voltage inhibit reset/recover hysteresis —
high range
60
mV
VLVDL
Falling low-voltage detect threshold — low range
(LVDV=00)
TBD
1.60
TBD
V
VLVW1L
VLVW2L
VLVW3L
VLVW4L
Low-voltage warning thresholds — low range
• Level 1 falling (LVWV=00)
• Level 2 falling (LVWV=01)
• Level 3 falling (LVWV=10)
• Level 4 falling (LVWV=11)
TBD 1.80 TBD
TBD 1.90 TBD
TBD 2.00 TBD
TBD 2.10 TBD
V
V
V
V
VHYSL
Low-voltage inhibit reset/recover hysteresis —
low range
40
mV
VBG Bandgap voltage reference
tLPO Internal low power oscillator period
factory trimmed
TBD
TBD
1.00
1000
TBD
TBD
V
μs
1. Rising thresholds are falling threshold + hysteresis voltage
Table 3. VBAT power operating requirements
Symbol Description
VPOR_VBAT Falling VBAT supply POR detect voltage
Min.
TBD
Typ.
1.1
Max.
TBD
Unit
V
Notes
1
1
Notes
K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Freescale Semiconductor, Inc.
Preliminary
11
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