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PDF LE25CA322 Data sheet ( Hoja de datos )

Número de pieza LE25CA322
Descripción Serial SPI EEPROM
Fabricantes Sanyo Semicon Device 
Logotipo Sanyo Semicon Device Logotipo



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No Preview Available ! LE25CA322 Hoja de datos, Descripción, Manual

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Ordering number : ENA1678B
LE25CA322
Serial SPI EEPROM (SPI Bus)
(32Kbit)
Overview
The LE25CA322 is a 32Kbit EEPROM that supports serial peripheral interface (SPI). It realizes high speed operation and
high level reliability by incorporating SANYO’s high performance CMOS EEPROM technology. The interface is
compatible with SPI bus protocol, therefore, it is best suited for applications that require small-scale rewritable nonvolatile
parameter memory. Moreover, the LE25CA322 has a 32 bytes page rewrite function that provides rapid data rewriting.
Features
Capacity
Single supply voltage
Serial interface
Operating clock frequency
Low current dissipation
Page write function
Rewrite time
Number of rewrite times
Data retention period
High reliability
: 32Kbits (4K×8bits)
: 2.7V to 5.5V
: SPI Mode0, Mode3 supported
: 5MHz
: Standby
: 5μA (max.)
: Active (Read) : 3mA (max.)
: Active (Rewrite) : 5mA (max.)
: 32bytes
: 5ms
: 105times/Address, 106 times/Page(Page=32Byte)
: 20years
: Adopts SANYO’s proprietary symmetric memory array configuration (USP6947325)
Incorporates a feature to prohibit write operations under low voltage conditions.
* This product is licensed from Silicon Storage Technology, Inc. (USA), and manufactured and sold by SANYO Semiconductor Co., Ltd.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer's products or
equipment.
40611 SY/10511 SY/31710 SY 20100219-S00008 No.NA1678-1/14
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LE25CA322 pdf
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LE25CA322
AC Characteristics (at FCLK = 5MHz)/VDD = 2.7V to 5.5V
Parameter
Symbol
Conditions
Clock frequency
FCLK
SCK logic high level pulse width
SCK logic low level pulse width
Input signal rise/fall time
CS setup time
SCK setup time
Data setup time
Data hold time
CS hold time
SCK hold time
CS standby pulse width
CS output high impedance time
SCK output data time
Output data hold time
WP setup time
WP hold time
HOLD setup time
HOLD hold time
HOLD output low impedance time
HOLD output high impedance time
Write cycle time
SCK output low impedance time
tCLHI
tCLLO
tRF
tCSS
tCLS
tDS
tDH
tCSH
tCLH
tCPH
tCHZ
tV
tHO
tWPS
tWPH
tHS
tHH
tHLz
tHHz
tWC
tCLZ
min typ
90
90
90
90
20
30
90
90
90
0
30
30
30
30
0
max
5
1
150
80
50
100
5
Unit
MHz
ns
ns
us
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
Table 1 Command Settings
Command
1st bus
cycle
2nd bus
cycle
3rd bus
cycle
4th bus
cycle
Write enable
(WREN)
06h
Write disable
(WRDI)
04h
Status register read
(RDSR)
05h
Status register write
01h DATA
(WRSR)
Read
(READ)
03h
A15-A8
A7-A0
Write
(WRITE)
02h
A15-A8
A7-A0
PD *1
Explanatory notes for Table 1
The “h” following each code indicates that the number given is in hexadecimal notation.
Addresses A15 to A12 for all commands are “don’t care.”
*1: “PD” stands for page program data. Any amount of data from 1 to 32 bytes is input.
5th bus
cycle
PD *1
6th bus
cycle
PD *1
nth bus
cycle
PD *1
No.NA1678-5/14
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LE25CA322 arduino
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LE25CA322
BP0, BP1 (bits2, 3)
Block Protect Settings
Block protect BP0 and BP1 are status register bits that can be rewritten, and the memory space to be protected can be
set depending on these bits. For the setting conditions, refer to “Table 3 Protect Level Setting Conditions.”
Table 3 Protect Level Setting Conditions
Protection Block (Level)
0 (Whole area unprotected)
1 (Upper 1/4 area protected)
2 (Upper 1/2 area protected)
3 (Whole area protected)
Status Register Bits
BP1 BP0
00
01
10
11
Protected Area
None
0C00h to 0FFFh
0800h to 0FFFh
0000h to 0FFFh
SRWP (bit7)
Status Register Write Protect Settings
Status register write protect SRWP is the bit for protecting the status registers, and its information can be rewritten.
When SRWP is “1” and the logic level of the WP pin is low, the status register write command is ignored, and status
registers BP0, BP1, BP2, and SRWP are protected. When the logic level of the WP pin is high, the status registers are
not protected regardless of the SRWP state. The SRWP setting conditions are shown in “Table 4 SRWP Setting
Conditions.”
Table 4 SRWP Setting Conditions
WP Pin
SRWP
Mode
10
Software protected
00
(SPM)
11
Hardware protected
01
(HPM)
Bit4, bit5, and bit6 are reserved bits, and have no significance.
Status Register
Unprotected
Protected
Protected Area
Protected
Protected
Unprotected Area
Unprotected
Unprotected
3. Write Enable (WREN)
Before performing any of the operations listed below, the device must be placed in the write enable state. Operation is
the same as for setting status register WEN to “1”, and the state is enabled by inputting the write enable command.
“Figure 7 Write Enable” shows the timing waveforms when the write enable operation is performed. The write enable
command consists only of the first bus cycle, and it is initiated by inputting (06h).
Write (WRITE)
Status register write (WRSR)
4. Write Disable (WRDI)
The write disable command sets status register WEN to “0” to prohibit unintentional writing. “Figure 8 Write Disable”
shows the timing waveforms. The write disable command consists only of the first bus cycle, and it is initiated by
inputting (04h).
The write disable state (WEN “0”) is exited by setting WEN to “1” using the write enable command (06h).
Figure 7 Write Enable
CS
SCK
SI
Mode3 0 1 2 3 4 5 6 7
Mode0
8CLK
06h
(00000110)
Figure 8 Write Disable
CS
SCK
SI
Mode3
Mode0
01 234 567
8CLK
04h
(00000100)
SO
High Impedance
SO
High Impedance
No.NA1678-11/14
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