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Número de pieza | LC723462W | |
Descripción | (LC723461W / LC723462W) Ultralow-Voltage ETR Controller | |
Fabricantes | Sanyo Semicon Device | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de LC723462W (archivo pdf) en la parte inferior de esta página. Total 13 Páginas | ||
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Ordering number : ENN*7275
Preliminary
CMOS IC
LC723461W, 723462W
Ultralow-Voltage ETR Controller
with On-Chip LCD Driver
Overview
The LC723461W and LC723462W are ultralow-voltage
electronic tuning microcontrollers that include a PLL that
operates up to 250 MHz and a 1/4 duty 1/2 bias LCD
driver on chip. This IC includes an on-chip DC-DC
converter that can easily create the power supply voltages
needed for electronic tuning and contribute to reducing
end product costs. This IC is optimal for portable audio
equipment that must operate from a single battery.
Function
• Program memory (ROM):
— 4096 × 16 bits (8K bytes) : LC723461
— 6144 × 16 bits (12K bytes): LC723462
• Data memory (RAM):
— 256 × 4 bits: LC723461
— 512 × 4 bits: LC723462
• Cycle time:
40 µs (all 1-word instructions) at 75kHz crystal oscillation
• Stack: 8 levels
• LCD driver: 48 to 80 segments (1/4 duty, 1/2 bias drive)
• Interrupts: Two external interrupts
Timer interrupts (1, 5, 10, and 50 ms)
• A/D converter:
Four input channels (8-bit chopper A/D converter. The
reference voltage can be switched using the ADCHG
instruction.)
• Input ports: 8 ports (of which three can be switched for
use as A/D converter input and one can be switched for
use as IF counter input.)
• Output ports: 6 ports (of which 1 can be switched for use
as the beep tone output and 2 are open-drain ports)
• I/O ports: 19 ports (of which 8 can be switched for use
as LCD ports and as mask options, of which 3 can be
switched for use as serial I/O ports) Can be switched for
CMOS output/open-drain outputs.
• Serial I/O: One system (LC723462)
• PLL: Reference frequencies:
1, 3, 3.125, 5, 6.25, 12.5, and 25 kHz
• Input frequencies: FM band: 10 to 250 MHz
AM band (high): 2 to 20 MHz
AM band (low): 0.5 to 10 MHz
• Input sensitivity:
FM band: 35 mVrms (10 mVrms at 130 MHz),
50 mVrms (130 to 250 MHz)
AM band (high, low): 35 mVrms
• IF count: HCTR input pin: 0.4 to 12 MHz (HCTR can
be switched to function as a general-purpose input port.)
Continued on next page.
Package Dimensions
unit: mm
3190A-SQFP64
[LC723461W, 723462W]
12.0
10.0
48 33
49 32
64
1
(1.25)
(0.5)
16
0.18
17
0.15
SANYO: SQFP64
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
12503RM (OT) No. 7275-1/13
Datasheet pdf - http://www.DataSheet4U.net/
1 page www.DataSheet.co.kr
LC723461W, 723462W
*1. Halt and PLL STOP mode current test circuit
*2. Backup mode current test circuit
7 pF
A
75 kHz
7 pF
XOUT VDD RES
XIN
PA, PF
VSS
FMIN
AMIN
HCTR
TEST1
VDC3
COMC
7 pF
A
75 kHz
7 pF
XOUT
XIN
VDD RES
VSS
FMIN
AMIN
HCTR
TEST1
VDC3
COMC
3V
With all ports other than those specified above left open.
With output mode selected for PC and PD.
With segments S13 to S20 selected.
Enter halt mode by software command.
The state where CPU operation is stopped with the
crystal oscillator unstopped.
With all ports other than those specified above left open.
With output mode selected for PC and PD.
With segments S13 to S20 selected.
Enter backup mode by software command.
The state where the crystal oscillator is stopped.
No. 7275-5/13
Datasheet pdf - http://www.DataSheet4U.net/
5 Page www.DataSheet.co.kr
LC723461W, 723462W
LC723461W/723462W Series Instruction Set
Terminology
ADDR
: Program memory address
b : Borrow
C : Carry
DH : Data memory address High (Row address) [2 bits]
DL : Data memory address Low (Column address) [4 bits]
I : Immediate data [4 bits]
M : Data memory address
N : Bit position [4 bits]
Rn : Resister number [4 bits]
Pn : Port number [4 bits]
PW : Port control word number [4 bits]
r : General register (One of the addresses from 00H to 0FH of BANK0)
( ), [ ]
: Contents of register or memory
M (DH, DL) : Data memory specified by DH, DL
Mnemonic
AD
ADS
AC
ACS
AI
AIS
AIC
AICS
SU
SUS
SB
SBS
SI
SIS
SIB
SIBS
SEQ
SEQI
SNEI
SGE
SGEI
SLEI
Operand
1st 2nd
rM
rM
rM
rM
MI
MI
MI
MI
rM
rM
rM
rM
MI
MI
MI
MI
rM
MI
MI
rM
MI
MI
Function
Add M to r
Add M to r, then skip if carry
Add M to r with carry
Add M to r with carry,
then skip if carry
Add I to M
Add I to M, then skip if carry
Add I to M with carry
Add I to M with carry,
then skip if carry
Subtract M from r
Subtract M from r,
then skip if borrow
Subtract M from r with borrow
Subtract M from r with borrow,
then skip if borrow
Subtract I from M
Subtract I from M,
then skip if borrow
Subtract I from M with borrow
Subtract I from M with borrow,
then skip if borrow
Skip if r equal to M
Skip if M equal to I
Skip if M not equal to I
Skip if r is greater than or
equal to M
Skip if M is greater than
equal to I
Skip if M is less than I
Operations function
Instruction format
f edcba9876543210
r ← (r) + (M)
0 1 0 0 0 0 DH
DL
r
r ← (r) + (M), skip if carry 0 1 0 0 0 1 DH
DL
r
r ← (r) + (M) + C
0 1 0 0 1 0 DH
DL
r
r ← (r) + (M) + C
skip if carry
0 1 0 0 1 1 DH
DL
r
M ← (M) + I
0 1 0 1 0 0 DH
DL
I
M ← (M) + I, skip if carry 0 1 0 1 0 1 DH
DL
I
M ← (M) + I + C
0 1 0 1 1 0 DH
DL
I
M ← (M) + I + C,
skip if carry
0 1 0 1 1 1 DH
DL
I
r ← (r) – (M)
0 1 1 0 0 0 DH
DL
r
r ← (r) – (M),
skip if borrow
0 1 1 0 0 1 DH
DL
r
r ← (r) – (M) – b
0 1 1 0 1 0 DH
DL
r
r ← (r) – (M) – b,
skip if borrow
0 1 1 0 1 1 DH
DL
r
M ← (M) – I
0 1 1 1 0 0 DH
DL
I
M ← (M) – I,
skip if borrow
0 1 1 1 0 1 DH
DL
I
M ← (M) – I – b
0 1 1 1 1 0 DH
DL
I
M ← (M) – I – b,
skip if borrow
0 1 1 1 1 1 DH
DL
I
(r) – (M), skip if zero
0 0 0 1 0 0 DH
DL
r
(M) – I, skip if zero
0 0 0 1 1 0 DH
DL
I
(M) – I, skip if not zero 0 0 0 0 0 1 DH
DL
I
(r) – (M),
skip if not borrow
0 0 0 1 1 0 DH
DL
r
(M) – I, skip if not borrow 0 0 0 1 1 1 DH
DL
I
(M) – I, skip if borrow
0 0 0 0 1 1 DH
DL
I
Continued on next page.
No. 7275-11/13
Datasheet pdf - http://www.DataSheet4U.net/
11 Page |
Páginas | Total 13 Páginas | |
PDF Descargar | [ Datasheet LC723462W.PDF ] |
Número de pieza | Descripción | Fabricantes |
LC723462W | (LC723461W / LC723462W) Ultralow-Voltage ETR Controller | Sanyo Semicon Device |
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