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PDF LC87F5NC8A Data sheet ( Hoja de datos )

Número de pieza LC87F5NC8A
Descripción 8-bit 1-chip Microcontroller
Fabricantes Sanyo Semicon Device 
Logotipo Sanyo Semicon Device Logotipo



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Ordering number : ENA0929
LC87F5NC8A
CMOS IC
FROM 128K byte, RAM 4096 byte on-chip
8-bit 1-chip Microcontroller
Overview
The SANYO LC87F5NC8A is an 8-bit microcomputer that, centered around a CPU running at a minimum bus cycle
time of 83.3ns, integrate on a single chip a number of hardware features such as 128K-byte flash ROM (onboard
rewritable), 4096byte RAM, Onchip debugging function, sophisticated 16-bit timers/counters (may be divided into 8-bit
timers), a 16-bit timer/counter (may be divided into 8-bit timers/counters or 8-bit PWMs), four 8-bit timers with a
prescaler, a base timer serving as a time-of-day clock, a high-speed clock counter, two synchronous SIO ports (with
automatic block transmission/reception capabilities), an asynchronous/synchronous SIO port, two UART ports (full
duplex), four 12-bit PWM channels, an 8-bit 15-channel AD converter, a system clock frequency divider, and a 29-
source 10-vector interrupt feature.
Features
„Flash ROM
Capable of on-board-programing with wide range, 2.7 to 5.5V, of voltage source
Block-erase in 128 byte units
• 131072 × 8 bits
„RAM
4096 × 9 bits
„Minimum Bus Cycle Time
83.3ns (12MHz)
125ns (8MHz)
500ns (2MHz)
VDD=2.8 to 5.5V
VDD=2.5 to 5.5V
VDD=2.2 to 5.5V
Note: Bus cycle time indicates the speed to read ROM.
„Minimum Instruction Cycle Time (tCYC)
250ns (12MHz)
375ns (8MHz)
1.5µs (2MHz)
VDD=2.8 to 5.5V
VDD=2.5 to 5.5V
VDD=2.2 to 5.5V
„Ports
Normal withstand voltage I/O ports
Ports whose I/O direction can be designated in 1-bit units
Ports whose I/O direction can be designated in 2-bit units
Ports whose I/O direction can be designated in 4-bit units
Normal withstand voltage input port
Dedicated oscillator ports
Reset pins
Power pins
64 (P1n, P2n, P3n, P70 to P73, P8n, PAn, PBn, PCn,
S2Pn, PWM0, PWM1, XT2)
16 (PEn, PFn)
8 (P0n)
1 (XT1)
2 (CF1, CF2)
1 (RES)
6 (VSS1 to 4, VDD1 to 4)
* This product is licensed from Silicon Storage Technology, Inc. (USA), and manufactured and sold by
SANYO Semiconductor Co., Ltd.
Ver.1.00
92607HKIM 20070810-S00009 No. A0929-1/25
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LC87F5NC8A pdf
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Package Dimensions
unit : mm (typ)
3151A
LC87F5NC8A
23.2
20.0
80 51
81 50
100
1
(0.58)
0.65
31
30
0.3
0.15
SANYO : QIP100E(14X20)
No.A0929-5/25
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LC87F5NC8A arduino
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LC87F5NC8A
(Example 2) The high-level output at the ports is unstable when the HOLD mode backup is in effect.
Power
Supply
Back-up
capacitor
LSI
VDD1
VDD2
VDD3
VDD4
VSS1 VSS2 VSS3 VSS4
Absolute Maximum Ratings at Ta = 25°C, VSS1 = VSS2 = VSS3 = VSS4 = 0V
Parameter
Maximum Supply
voltage
Input voltage
Input/Output
Voltage
Symbol
VDD max
VI(1)
VIO(1)
Pins/Remarks
VDD1, VDD2,
VDD3, VDD4
XT1, CF1
Ports 0, 1, 2
Ports 3, 7, 8
Ports A, B, C, E, F
SI2P0 to SI2P3
PWM0, PWM1,XT2
Conditions
VDD1=VDD2=VDD3=VDD4
VDD[V]
min
-0.3
-0.3
-0.3
Specification
typ max
+6.5
VDD+0.3
VDD+0.3
unit
V
Peak output
current
IOPH(1)
Ports 0, 1, 2, 3
Ports A, B, C, E, F
SI2P0 to SI2P3
CMOS output select per 1
application pin
-10
IOPH(2)
PWM0, PWM1
Per 1 application pin.
-20
IOPH(3)
P71 to P73
Per 1 application pin.
-5
Average output
current
(Note1-1)
IOM(1)
Ports 0, 1, 2, 3
Ports A, B, C, E, F
SI2P0 to SI2P3
CMOS output select per 1
application pin
-7.5
IOM(2)
PWM0, PWM1
Per 1 application pin.
-10
IOM(3)
P71 to P73
Per 1 application pin.
-3
Total output
current
ΣIOAH(1)
ΣIOAH(2)
P71 to P73
PWM0, PWM1
SI2P0 to SI2P3
Total of all applicable pins
Total of all applicable pins
-10
-25
mA
ΣIOAH(3) Port 0
Total of all applicable pins
-25
ΣIOAH(4)
Port 0
PWM0, PWM1
Total of all applicable pins
-45
SI2P0 to SI2P3
ΣIOAH(5) Ports 2, 3, B
Total of all applicable pins
-25
ΣIOAH(6) Ports A, C
Total of all applicable pins
-25
ΣIOAH(7) Ports 2, 3, A, B, C
Total of all applicable pins
-45
ΣIOAH(8) Port F
Total of all applicable pins
-25
ΣIOAH(9) Ports 1, E
Total of all applicable pins
-25
ΣIOAH(10) Ports 1, E, F
Total of all applicable pins
-45
Note 1-1: Average output current is average of current in 100ms interval.
Continued on next page.
No.A0929-11/25
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