PDF LC86F3G64A Data sheet ( Hoja de datos )

Número de pieza	LC86F3G64A
Descripción	8-bit 1-chip Microcontroller
Fabricantes	Sanyo Semicon Device
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No Preview Available ! www.DataSheet.co.kr Ordering number : ENA0121A LC86F3G64A CMOS IC 96K-byte Flash Memory (ROM 64K-byte+CGROM 16K-byte +Extended ROM 16K-byte) on-chip 768-byte RAM and 352×9-bit Display RAM 8-bit 1-chip Microcontroller Overview The LC86F3G64A is a CMOS 8-bit single chip microcontroller with Flash Memory for the LC863G00 series. This microcontroller contains the following on-chip functional blocks: • CPU: Operable at a minimum bus cycle time of 0.424µs • On-chip ROM capacity: 96K bytes Flash Memory (Program ROM: 64K bytes, CGROM: 16K bytes, Extended ROM: 16K bytes ) • On-chip RAM capacity: 768 bytes • Display RAM: 352 × 9 bits • Closed-Caption TV controller and the on-screen display controller • Closed-Caption data slicer • Five channels × 8-bit AD Converter • Three channels × 7-bit PWM • Two 16-bit timer/counters, 14-bit base timer • 8-bit synchronous serial interface circuit • IIC-bus compliant serial interface circuit (Multi-master type) • UART interface circuit (full duplex) • ROM correct function • 16-source 10-vectored interrupt system Continued on next page. Note : This product includes the IIC bus interface circuit. If you intend to use the IIC bus interface, please notify us of this in advance of our receiving your program ROM code order. Purchase of SANYO IIC components conveys a license under the Philips IIC Patents Rights to use these components in an IIC system, provided that the system conforms to the IIC Standard Specification as defined by Philips. Trademarks IIC is a trademark of Philips Corporation. * This product is licensed from Silicon Storage Technology, Inc. (USA), and manufactured and sold by SANYO Semiconductor Co., Ltd. Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. Ver.1.00 N0106HKIM 20060830-S00008 No.A0121-1/25 Datasheet pdf - http://www.DataSheet4U.net/ 1 page www.DataSheet.co.kr LC86F3G64A • Interrupt priority control Three interrupt priorities are supported (low, high and highest) and multi-level nesting is possible. Low or high priority can be assigned to the interrupts from 3 to 10 listed above. For the external interrupt INT0 and INT1, low or highest priority can be set. Sub-routine Stack Level • A maximum of 128 levels (stack area is assigned on the internal RAM) Multiplication/Division Instruction • 16 bits×8 bits (7 instruction cycle times) • 16 bits÷8 bits (7 instruction cycle times) 3 Oscillation Circuits • Built-in RC oscillation circuit used for the system clock • Built-in VCO circuit used for the system clock and OSD clock • On-chip X’tal oscillation circuit used for PLL reference and the system clock and base timer clock Standby Function • HALT mode The HALT mode is used to reduce the power dissipation. In this operation mode, the program execution is stopped. This mode can be released by the interrupt request or the system reset. • HOLD mode The HOLD mode is used to stop the oscillations; RC (internal), VCO, and X’tal oscillations. This mode can be released by the following conditions. - Pull the reset terminal (RES) to low level. - Feed the selected level to either P70/INT0 or P71/INT1. - Feed the Port 0 interrupt condition Applicable Mask ROM Version • LC863G64/LC863G56/LC863G48/LC863G40/LC863G32/LC863G28/LC863G24 • LC863864/LC863856/LC863848/LC863840/LC863832/LC863828/LC863824/LC863820/LC863816 • LC863364/LC863356/LC863348/LC863340/LC863332/LC863328/LC863324/LC863320/LC863316 • LC863264/LC863256/LC863248/LC863240/LC863232/LC863228/LC863224/LC863220/LC863216 Package • DIP42S (Lead-free type) • QIP48E (Lead-free type) Development Tools • Evaluation chip: LC863096 • Emulator: LC863G00 series: Special ROM monitor tool (When debugging it, one terminal in the I/O port is used as a pin only for the tool) LC863800 series:EVA86000(main) + ECB863200A (evaluation chip board) + POD863200 (pod:DIP42S) [Shared with LC8632 Series] or POD863201 (QIP48E) [Shared with LC8632 Series] LC863300 series:EVA86000(main) + ECB8632001 or ECB863200A (evaluation chip board) + POD863300 (pod:DIP42S) or POD863301 (QIP48E) LC863200 series: EVA86000(main) + ECB8632001 or ECB863200A (evaluation chip board) + POD863200 (pod:DIP42S) or POD863201 (QIP48E) *1 This product is no longer available Write Flash Memory SANYO provides special services including writing data to Flash Memory and stamping. There is a charge for these services. Please feel free to ask our sales persons for details. No.A0121-5/25 Datasheet pdf - http://www.DataSheet4U.net/ 5 Page www.DataSheet.co.kr LC86F3G64A Notice for Use • Input level of terminal RES at power on Terminal RES must be held low for at least 200µs after the supply voltage exceeds the power supply lower limit. Power supply RES 200µs or more VDD limit 0V • Difference between the Mask version and Flash version 1. The operation after release of reset: The mask version operates the program from the address 0 in the program counter as soon as detecting the H level on the reset port. The flash version operates the program from the address 0 in the program counter after setting the option. 2. Current dissipation : Please refer to the latest semiconductor news. • Conditions during reset and after release of reset Port options are set using Flash Memory data. Port options are set internally within approximately 3ms after logic HIGH is applied to the RESET terminal. The configuration of the port outputs change over the duration of this period. Then the Program Counter is set to 0 and program execution begins. During reset, and in the few hundred milliseconds after reset is released, the port options on certain of the ports will not yet have been set. The conditions of the various ports during reset or on release of reset have been collected in the following table. Please refer to it when analyzing circuits where these conditions apply. Pins P0 P1 P6 P7 P8 Options Input: Without pull up MOS transistor Output: N-channel open drain Input: With pull up MOS transistor Output: CMOS Input: With programmable pull up MOS transistor Output: N-channel open drain Input: With programmable pull up MOS transistor Output: CMOS No options Output: N-channel open drain No options Input: With programmable pull up MOS transistor Output: N-channel open drain (P70) CMOS (P71 - P73) No options Input: With programmable pull up MOS Transistor (P83: without it) Output: CMOS (P83: input only) Condition during and on release of reset Output -off Input mode: High impedance Output-off During reset and in the first few hundred µs after reset is released, the pull-up MOS transistor is OFF. Thereafter, set to input mode with pull-up MOS Tr. ON Output-off Input mode: High impedance Output -off Input mode: High impedance Output-off Input mode: Pull up MOS transistor off Output-off Input mode: Pull up MOS transistor off No.A0121-11/25 Datasheet pdf - http://www.DataSheet4U.net/ 11 Page

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