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PDF NL6448BC20-14 Data sheet ( Hoja de datos )
| Número de pieza | NL6448BC20-14 | |
| Descripción | Display Module | |
| Fabricantes | NEC | |
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Gleichmann & Co. Electronics GmbH
Product Marketing Displays & Systems
Industriestr. 16, D- 76297 Stutensee
Tel :07249-910-0, Fax: 07249-910-559
http://www.msc-ge.com
TFT COLOR LCD MODULE
NL6448BC20-14
16.6cm (6.5 Type)
VGA
DATA SHEET
DOD-PD-0696 (1st edition)
This DATA SHEET is updated document from
PRELIMINARY DATA SHEET DOD-PD-0669(2).
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PD-0696 (1st edition) 1 © NEC LCD Technologies, Ltd.
Published date: October 2004 CP (N)
2004 All rights reserved.
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NL6448BC20-14
2. GENERAL SPECIFICATIONS
Display area
Diagonal size of display
Drive system
Display color
Pixel
Pixel arrangement
Dot pitch
Pixel pitch
Module size
Weight
Contrast ratio
Viewing angle
Designed viewing direction
Polarizer surface
Polarizer pencil-hardness
Color gamut
Response time
Luminance
Reflectance (Reference)
Signal system
Power supply voltage
132.48 (H) × 99.36 (V) mm
16.6 cm (6.5 inches)
a-Si TFT active matrix
262,144 colors
640 (H) × 480 (V) pixels
RGB (Red dot, Green dot, Blue dot) vertical stripe
0.0690 (H) × 0.2070 (V) mm
0.2070 (H) × 0.2070 (V) mm
178.8 (W) × 126.8 (H) × 11.0 (D) mm (typ.)
240 g (typ.)
At transmissive mode
400:1 (typ.)
At transmissive mode and the contrast ratio≥ 10:1
• Horizontal: Right side 50° (typ.), Left side 50° (typ.)
• Vertical: Up side 35° (typ.), Down side 45° (typ.)
At transmissive mode and DPS= Low or open: Normal scan
• Viewing direction without image reversal: up side (12 o'clock)
• Viewing direction with contrast peak: down side (6 o'clock)
• Viewing angle with optimum grayscale (γ=2.2): normal axis (perpendicular)
Clear + Antireflection (AR)
2H (min.) [by JIS K5400]
At transimissive mode and LCD panel center
42 % (typ.) [against NTSC color space]
At transimissive mode, Ton+Toff (10%←→ 90%)
49 ms (typ.)
At transimissive mode and IBL= 5.0mArms / lamp
500 cd/m2 (typ.)
2.0 % (typ.)
6-bit digital signals for data of RGB colors,
Dot clock (CLK), Data enable (DE),
Horizontal synchronous signal (Hsync),
Vertical synchronous signal (Vsync)
LCD panel signal processing board: 3.3V or 5.0V
Edge light type: 2 cold cathode fluorescent lamps
Backlight
Replaceable part
• Lamp holder set: Type No. 65LHS04
Recommended inverter (Option)
• Inverter: Type No. 65PWB31
Power consumption
At IBL=5.0mArms / lamp and checkered flag pattern
5.0 W (typ., Power dissipation of the inverter is not included.)
DATA SHEET DOD-PD-0696 (1st edition)
5
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4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 LCD panel signal processing board
VCC
Note1
3.0V or 4.75V
0V
ON
Tr < 150ms
Display signals
Function signal
Note2
0ms < t < 35ms
VALID period
NL6448BC20-14
OFF
Toff >150ms
0ms < t < 35ms
Note1: In terms of voltage variation (voltage drop) while VCC rising edge is below 3.0V in "VCC =
3.3V" or 4.75V in "VCC = 5.0V", a protection circuit may work, and then this product may
not work.
Note2: Display signals (CLK, Hsync, Vsync, DE, R0 to R5, G0 to G5, B0 to B5) and function signal
(DPS) must be Low or High-impedance, exclude the VALID period (See above sequence
diagram), in order to avoid that internal circuits is damaged.
If some of display and function signals of this product are cut while this product is working,
even if the signal input to it once again, it might not work normally. If customer stops the
display and function signals, they should be cut VCC.
4.4.2 Inverter (Option)
Display signals
Function signal
Note1
Note2
VALID period
VDDB
Note1: These are the display and function signals for LCD panel signal processing board.
Note2: The inverter power supply voltage (VDDB) should be inputted within the valid period of
display and function signals, in order to avoid unstable data display.
DATA SHEET DOD-PD-0696 (1st edition)
11
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