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PDF FM18W08 Data sheet ( Hoja de datos )

Número de pieza FM18W08
Descripción 256Kb Wide Voltage Bytewide F-RAM
Fabricantes Ramtron 
Logotipo Ramtron Logotipo



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No Preview Available ! FM18W08 Hoja de datos, Descripción, Manual

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Pre-Production
FM18W08
256Kb Wide Voltage Bytewide F-RAM
Features
256Kbit Ferroelectric Nonvolatile RAM
Organized as 32,768 x 8 bits
High Endurance 100 Trillion (1014) Read/Writes
38 year Data Retention
NoDelay™ Writes
Advanced High-Reliability Ferroelectric Process
Superior to BBSRAM Modules
No Battery Concerns
Monolithic Reliability
True Surface Mount Solution, No Rework Steps
Superior for Moisture, Shock, and Vibration
Resistant to Negative Voltage Undershoots
SRAM & EEPROM Compatible
JEDEC 32Kx8 SRAM & EEPROM pinout
70 ns Access Time
130 ns Cycle Time
Low Power Operation
Wide Voltage Operation 2.7V to 5.5V
12 mA Active Current
20 A (typ.) Standby Current
Industry Standard Configuration
Industrial Temperature -40C to +85C
28-pin “Green”/RoHS SOIC Package
Description
The FM18W08 is a 256-kilobit nonvolatile memory
employing an advanced ferroelectric process. A
ferroelectric random access memory or F-RAM is
nonvolatile but operates in other respects as a RAM.
It provides data retention for 38 years while
eliminating the reliability concerns, functional
disadvantages and system design complexities of
battery-backed SRAM (BBSRAM). Fast write timing
and high write endurance make F-RAM superior to
other types of nonvolatile memory.
In-system operation of the FM18W08 is very similar
to other RAM devices. Minimum read- and write-
cycle times are equal. The F-RAM memory, however,
is nonvolatile due to its unique ferroelectric memory
process. Unlike BBSRAM, the FM18W08 is a truly
monolithic nonvolatile memory. It provides the same
functional benefits of a fast write without the
disadvantages associated with modules and batteries
or hybrid memory solutions.
These capabilities make the FM18W08 ideal for
nonvolatile memory applications requiring frequent
or rapid writes in a bytewide environment. The
availability of a true surface-mount package improves
the manufacturability of new designs. Device
specifications are guaranteed over an industrial
temperature range of -40°C to +85°C.
Pin Configuration
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 VDD
27 WE
26 A13
25 A8
24 A9
23 A11
22 OE
21 A10
20 CE
19 DQ7
18 DQ6
17 DQ5
16 DQ4
15 DQ3
Ordering Information
FM18W08-SG 28-pin “Green” SOIC
This is a product in the pre-production phase of development. Device
characterization is complete and Ramtron does not expect to change
the specifications. Ramtron will issue a Product Change Notice if any
specification changes are made.
Rev. 2.0
Dec. 2011
Ramtron International Corporation
1850 Ramtron Drive, Colorado Springs, CO 80921
(800) 545-FRAM, (719) 481-7000
http://www.ramtron.com
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FM18W08 pdf
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FM18W08
A second design consideration relates to the level of
VDD during operation. Battery-backed SRAMs are
forced to monitor VDD in order to switch to battery
backup. They typically block user access below a
certain VDD level in order to prevent loading the
battery with current demand from an active SRAM.
The user can be abruptly cut off from access to the
nonvolatile memory in a power down situation with
no warning or indication.
F-RAM memories do not need this system overhead.
The memory will not block access at any VDD level
that complies with the specified operating range. The
user should take measures to prevent the processor
from accessing memory when VDD is out-of-
tolerance. The common design practice of holding a
processor in reset during powerdown may be
sufficient. It is recommended that Chip Enable is
pulled high and allowed to track VDD during powerup
and powerdown cycles. It is the user’s responsibility
to ensure that chip enable is high to prevent accesses
below VDD min. (2.7V). Figure 3 shows a pullup
resistor on /CE which will keep the pin high during
power cycles assuming the MCU/MPU pin tri-states
during the reset condition. The pullup resistor value
should be chosen to ensure the /CE pin tracks VDD yet
a high enough value that the current drawn when /CE
is low is not an issue.
MCU/
MPU
VDD
R FM18W08
CE
WE
OE
A(14:0)
DQ
Figure 3. Use of Pullup Resistor on /CE
Rev. 2.0
Dec. 2011
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FM18W08 arduino
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Revision History
Revision
1.0
1.1
1.2
2.0
Date
11/22/2010
12/20/2010
3/10/2011
12/20/2011
Summary
Initial Release
Updated MSL rating.
Changed tPU and tVF spec limits.
Changed to Pre-Production status.
FM18W08
Rev. 2.0
Dec. 2011
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