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PDF FP6321 Data sheet ( Hoja de datos )

Número de pieza FP6321
Descripción Sunchronous Buck PWM DC-DC Controller
Fabricantes Fitipower 
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No Preview Available ! FP6321 Hoja de datos, Descripción, Manual

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FP6321
Synchronous Buck PWM
DC-DC Controller
Description
The FP6321 is designed to drive two N-channel
MOSFETs in a synchronous rectified buck topology.
It provides the output adjustment, internal soft-start,
frequency compensation networks, monitoring and
protection functions into a single package.
The IC operating at fixed 300kHz frequency provides
simple, single feedback loop, voltage mode control
with fast transient response. The resulting PWM duty
ratio ranges from 0-100%.
The FP6321 features over current protection. The
output current is monitored by sensing the voltage
drop across the RDS-ON of the low side MOSFET
which eliminates the need for a current sensing
resistor.
This device is available in SOP-8 package.
Features
Operates from +5V or +12V
Drives Two Low Cost N-Channel MOSFETs
Fast Transient Response
Simple Single-Loop Control Design
( Voltage-Mode PWM Control)
Internal Soft-Start
Over-Current Fault Monitor
SOP-8 Package
RoHS Compliant
Applications
Motherboard
Graphic Card
Telecomm Equipments
High Power DC-DC Regulators
Servers
Pin Assignment
SO Package (SOP-8)
Figure 1. Pin Assignment of FP6321
Ordering Information
FP6321□□□
TR: Tape / Reel
P:Green
G:Green
Package Type
SO: SOP-8
FP6321-1.3 -FEB-2010
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FP6321 pdf
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Electrical Characteristics
(VCC=5V/12V, TA=25°C, unless otherwise specified)
Parameter
Symbol Conditions
INPUT
VCC Under Voltage Lockout
Quiescent Current
VRISING
VFALLING
ICC
VCC rising
VCC falling
UGATE and LGATE open
ERROR AMPLIFIER
Feedback Voltage
VFB
FB Input Bias Current
IFB VFB=1V
Open Loop DC gain (Note2)
AO
OSCILLATOR
Frequency
Ramp Amplitude (Note2)
FOSC
VOSC
VCC=12V
VCC=12V
GATE DRIVERS
Upper Gate Source
Upper Gate Sink
Lower Gate Source
Lower Gate Sink
Dead Time (Note2)
IUGATE
RUGATE
ILGATE
RLGATE
TDT
VBOOT-VPHASE=12V,
VUGATE-VPHASE=6V
VBOOT-VPHASE=12V,
VUGATE-VPHASE=1V
VCC=12V, VLGATE =6V
VCC=12V, VLGATE =1V
PROTECTION
FB Under-Voltage Trip
OC Current Source
Soft-Start Interval (Note2)
Note2Guarantee by design.
IOCSET
Tss
FB Falling
VPHASE=0V
FP6321
Min Typ Max Unit
3.7 4.1 4.5 V
0.25 V
2 6 mA
0.784 0.8 0.816 V
0.1 uA
85 dB
250 300 350 kHz
1.5 Vp-p
300 500
mA
4 8
300 500
mA
3 5
100 ns
70 75 80 %
35 40 45 uA
2 3.5
ms
FP6321-1.3 -FEB-2010
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FP6321 arduino
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Application Information (Continued)
FP6321
Calculation Formula
VOUT=VFB x ((R3/R2) + 1)
[ ]L
VIN(min)
-
VDS(SAT) - VOUT
ΔIL
× TON(max)
I = I - IRIPPPLE LOAD(max) LOAD(min)
COUT
ESR
=
[
VRIPPLE
ΔI L
]
VDC -Rating 1.5 × VOUT
CIN
IIN(rms) = IOUT × D(1 D)
VDC-rating 1.5 × VIN(max)
Calculation
D
Step-down (buck) regulator
TON /(TON +TOFF )
VOUT/VIN
ΔIL 2 x 10% x IO
IIN(rms)
IOUT × D (1 D )
Board Layout
Figure 18. Top Layer
Figure 19. Bottom Layer
Figure 20. Inner Layer 2
FP6321-1.3 -FEB-2010
Figure 21. Inner layer 3
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