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PDF L24C02B Data sheet ( Hoja de datos )
| Número de pieza | L24C02B | |
| Descripción | (L24Cxx) EEPROM | |
| Fabricantes | LIZE | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de L24C02B (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
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Datasheet pdf - http://www.DataSheet4U.net/
www.DataSheet.co.kr Shenzhen LIZE Electronic Technology Co., Ltd
SPECIFICATION
L24C02B/L24C04/L24C08B/L24C16
Version 2.0
reserves the right to change this documentation without prior notice.
Shenzhen LIZE Electronic Technology Co., Ltd
Version: 2.0
Date: 13, Apr. 2010
Page: 1 of 16
1 page  
Datasheet pdf - http://www.DataSheet4U.net/
Tel:86-755-8835 3502/03/04
Website:http://www.lizhiic.com
Fax:86-755-8835 3509
www.DataSheet.co.kr
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which
must precede any other command (see to Figure 2 on page 5).
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a
read sequence, the stop command will place the EEPROM in a standby power mode (see Figure 2 on
page 5).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM
in 8-bit words. The EEPROM sends a "0" to acknowledge that it has received each word. This
happens during the ninth clock cycle.
STANDBY MODE: The L24C02B/L24C04/L24C08B/L24C16 features a low-power standby mode
which is enabled: (a) upon power-up and (b) after the receipt of the STOP bit and the completion of
any internal operations.
MEMORY RESET: After an interruption in protocol, power loss or system reset, any two-wire part
can be reset by following these steps:
1. Clock up to 9 cycles.
2. Look for SDA high in each cycle while SCL is high.
3. Create a start condition.
● Figure 1: Data Validity
� Figure 2: Start and Stop Definition
Shenzhen LIZE Electronic Technology Co., Ltd
Version: 2.0
Date: 15, Apr. 2010
Page: 5 of 16
5 Page 
Datasheet pdf - http://www.DataSheet4U.net/
Tel:86-755-8835 3502/03/04
Website:http://www.lizhiic.com
Fax:86-755-8835 3509
www.DataSheet.co.kr
Note
1. This parameter is characterized and is not 100% tested.
2. AC measurement conditions: RL (connects to VCC): 1.3 kΩ (2.5V, 5V), 10 kΩ (1.8V)
Input pulse voltages: 0.3 VCC to 0.7 VCC
Input rise and fall time: ≤50 ns
Input and output timing reference voltages: 0.5 VCC
The value of RL should be concerned according to the actual loading on the user's system.
▉Bus Timing
Figure 10: SCL: Serial Clock, SDA: Serial Data I/O
▉Write Cycle Timing
� Figure 11: SCL: Serial Clock, SDA: Serial Data I/O
Note
1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the
internal clear/write cycle.
Shenzhen LIZE Electronic Technology Co., Ltd
Version: 2.0
Date: 15, Apr. 2010
Page: 11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet L24C02B.PDF ] | |
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