PDF 10H116 Data sheet ( Hoja de datos )

Número de pieza	10H116
Descripción	MC10H116
Fabricantes	ON Semiconductor
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No Preview Available ! www.DataSheet.co.kr MC10H116 Triple Line Receiver The MC10H116 is a functional/pinout duplication of the MC10116, with 100% improvement in propagation delay and no increase in power–supply current. • Propagation Delay, 1.0 ns Typical • Power Dissipation 85 mW Typ/Pkg (same as MECL 10K) • Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range) • Voltage Compensated • MECL 10K–Compatible 42 53 96 10 7 12 14 13 15 11 VBB* VCC1 = Pin 1 VCC2 = Pin 16 VEE = Pin 8 When input pin with bubble goes positive it’s respective output pin with bubble goes positive. *VBB to be used to supply bias to the MC10H115 only and bypassed (when used) with 0.01 µF to 0.1 µF capacitor to ground (0 V). VBB can source < 1.0 mA. The MC10H115 is designed to be used in sensing differential signals over long lines. The bias supply (VBB) is made available to make the device useful as a Schmitt trigger, or in other applications where a stable reference voltage is necessary. Active current sources provide these receivers with excellent common–mode noise rejection. If any amplifier in a package is not used, one input of that amplifier must be connected to VBB to prevent unbalancing the current–source bias network. The MC10H115 does not have internal–input pull– down resistors. This provides high impedance to the amplifier input and facilitates differential connections. Applications: • Low Level Receiver • Voltage Level • Schmitt Trigger Interface Figure 1. Logic Diagram VCC1 1 16 VCC2 AOUT 2 15 COUT AOUT 3 14 COUT AIN 4 13 CIN AIN 5 12 CIN BOUT 6 11 VBB BOUT 7 10 BIN VEE 8 9 BIN Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D). Figure 2. Dip Pin Assignment 16 1 16 1 1 http://onsemi.com CDIP–16 L SUFFIX CASE 620A PDIP–16 P SUFFIX CASE 648 MARKING DIAGRAMS 16 MC10H116L AWLYYWW 1 16 MC10H116P AWLYYWW 1 1 PLCC–20 FN SUFFIX CASE 775 10H116 AWLYYWW 16 1 SO–16 D SUFFIX CASE 751B 16 10H116 AWLYWW 1 A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week ORDERING INFORMATION Device Package Shipping MC10H116L CDIP–16 25 Units/Rail MC10H116P PDIP–16 25 Units/Rail MC10H116FN PLCC–20 48 Units/Rail MC10H116D SO–16 55 Units/Rail © Semiconductor Components Industries, LLC, 2001 September, 2001 – Rev. 8 1 Publication Order Number: MC10H116/D Datasheet pdf - http://www.DataSheet4U.net/ 1 page www.DataSheet.co.kr MC10H116 PACKAGE DIMENSIONS PDIP–16 P SUFFIX PLASTIC DIP PACKAGE CASE 648–08 ISSUE R –A– 16 9 B 18 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. FC S L H G –T– SEATING PLANE KJ D 16 PL 0.25 (0.010) M T A M M INCHES MILLIMETERS DIM MIN MAX MIN MAX A 0.740 0.770 18.80 19.55 B 0.250 0.270 6.35 6.85 C 0.145 0.175 3.69 4.44 D 0.015 0.021 0.39 0.53 F 0.040 0.70 1.02 1.77 G 0.100 BSC 2.54 BSC H 0.050 BSC 1.27 BSC J 0.008 0.015 0.21 0.38 K 0.110 0.130 2.80 3.30 L 0.295 0.305 7.50 7.74 M 0_ 10_ 0 _ 10 _ S 0.020 0.040 0.51 1.01 http://onsemi.com 5 Datasheet pdf - http://www.DataSheet4U.net/ 5 Page

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