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PDF OV511+ Data sheet ( Hoja de datos )
| Número de pieza | OV511+ | |
| Descripción | Advanced Camera to USB Bridge | |
| Fabricantes | OmniVision Technologies | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de OV511+ (archivo pdf) en la parte inferior de esta página. Total 31 Páginas | ||
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OV511+
Advanced Camera to USB Bridge
OmniVision Technologies, Inc.
May 13, 2000
Data Sheet Rev. 1.2
OmniVision Technologies, Inc. reserves the right to make changes without further notice to any
product herein to improve reliability, function or design. OmniVision does not assume any liability
arising out of the application or use of any project, circuit described herein; neither does it
convey any license under its patent nor the right of others.
This document contains information of a proprietary nature. None of this information shall be
divulged to persons other than OmniVision Technologies, Inc. employee authorized by the nature
of their duties to receive such information, or individuals or organizations authorized by
OmniVision Technologies, Inc.
1 page  
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1
1 Features
§ Low cost, integrated solution for USB PC camera applications
§ Built-in USB transceiver with selectable external USB transceiver interface
§ USB compliance current consumption in unconfigured, configured, suspend & operating
modes
§ USB full speed signaling bit rate
§ USB high powered, bus powered device
§ Supports USB control and isochronous pipes
§ Supports 8 isochronous interface alternates of up to 7.5Mbps USB transfer rate
§ 256Kx16, 5V, EDO, CAS-BEFORE-RAS refresh, 60ns DRAM required
§ Camera Interface: 16-bit YUV 4:2:2/RGB raw data formats (two channels) or 8-bit Y
4:0:0/RGB raw data formats (one channel only)
§ Supports clamping, down-scaling & filtering circuits for different video formats
(VGA/SIF/QSIF or CIF/SIF/QCIF/QSIF)
§ Supports proprietary real-time compression engine of up to 8:1 (10~15fps at VGA)
§ VGA resolution uncompressed still image with snapshot button
§ Supports SCCB (Serial Camera Control Bus) master function running at 100KHz (normal
mode)
§ Supports programmable LED control
§ Supports programmable switching power clock with frequencies of 24K/48K/96K/192KHz
4
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2.2.5 UDC interface
UDC interface performs hand-shaking protocols with USB Device Controller. Its function includes
isochronous transfer, responding vendor commands & descriptors, and generating read/write
cycles to internal registers.
2.2.6 System Control
System control unit performs functions of system clock generation, Power On Reset, software
reset scheme, USB Reset command, system initialization, snapshot and USB suspend.
OV511+ takes 48MHz crystal input for USB bus. “CLK_48M” is also divided by 2 and provides
clock of core logic and camera clock. Pin “EN_OSC27” has to be pulled down.
Figure 11. Clock Scheme of OV511+
OV511+
48
MHz
%
2
core logic
camera
USB
Device
Controller
There are three kinds of reset scheme supported by OV511+. The Power-On Reset (pin
“RESETB”) and USB Reset command initialize OV511+ & camera circuits. The Camera Reset
(pin “RESET”) toggles as soon as either Power-On Reset or USB Reset is asserted. The
software reset allows individual functional blocks to be reset without altering the register
contents. Software reset is necessary when changing camera formats, ISO packet size,
compression parameters, etc.
According to USB specification, a high-power (> 100mA) function requires staged switching of
power. It must first come up in a reduced power state of less than one unit load, which is 100mA.
System initialization function stops system clocks as well as sets camera into power down mode
by using pin “PWDN” before bus enumeration. If sufficient power exists in the power budget, the
remainder of the function will be powered on by setting register bit “EN_SYS” (register 53h). Pin
“SPWDN” has to be pulled up for the current power management scheme.
The snapshot function can be achieved by either setting register bit “SNAP[2]” (register 52h) or
pushing a button(pin “SNAPB”) on the system. Hardware snapshot function is initiated by setting
register bit “SNAP[0]” (register 52h). Once pushing the button, the internal snapshot signal is
latched, registers of the camera interface & camera itself are automatically modified to desired
formats as well. As soon as OV511+ captures one single frame of image and sends to the host,
the software driver clears the internal snapshot signal for next snapshot operation by writing a
sequence 0-1-0 to register bit “SNAP[1]” (register 52h).
When USB bus idles for more than 3 msec, OV511+ goes into suspend mode and all clocks are
stopped by pin “OSC_EN”, while all internal registers are remained the same values. The system
wakes up when the USB resume condition occurs.
LED control pin “LEDCTL” is accessible by register bit “LEDCTL” (register 55h). It can also be a
programmable I/O pin.
Switching power clock pin “PWCK” is programmable by register bit “PWCK[1:0]” (register 54h). It
can be programmed to frequencies of 24K/48K/96K/192KHz.
10
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