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PDF NL6448BC20-20 Data sheet ( Hoja de datos )
| Número de pieza | NL6448BC20-20 | |
| Descripción | LCD Module | |
| Fabricantes | NEC | |
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TFT COLOR LCD MODULE
NL6448BC20-20
17cm (6.5 Type)
VGA
DATA SHEET
DOD-PD-1362 (1st edition)
This DATA SHEET is updated document from
PRELIMINARY DATA SHEET DOD-PD-1241(1).
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PD-1362 (1st edition)
Published date: March 2006 CP(N)
1 © NEC LCD Technologies, Ltd.
2006 All riwghwtswr.eDsaetravSehde.et4U.net
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NL6448BC20-20
2. GENERAL SPECIFICATIONS
Display area
132.48 (H) × 99.36 (V) mm
Diagonal size of display 17cm (6.5inches)
Drive system
a-Si TFT active matrix
Display color
262,144 colors
Pixel
640 (H) × 480 (V) pixels
Pixel arrangement
RGB (Red dot, Green dot, Blue dot) vertical stripe
Dot pitch
0.069 (H) × 0.207 (V) mm
Pixel pitch
0.207 (H) × 0.207 (V) mm
Module size
153.0 (W) × 118.0 (H) × 10.5 (D) mm (typ.)
Weight
205g (typ.)
Contrast ratio
Viewing angle
Designed viewing direction
Polarizer surface
600:1 (typ.)
At the contrast ratio ≥10:1
• Horizontal: Right side 80° (typ.), Left side 80° (typ.)
• Vertical: Up side 80° (typ.), Down side 60° (typ.)
At DPS= Low or open: Normal scan
• Viewing direction without image reversal: up side (12 o'clock)
• Viewing direction with contrast peak: down side (6 o'clock)
• Viewing angle with optimum grayscale (γ=2.2): normal axis
(perpendicular)
Clear + Antireflection (AR)
Polarizer pencil-hardness
Color gamut
Response time
Luminance
Signal system
Power supply voltage
2H (min.) [by JIS K5400]
At LCD panel center
40% (typ.) [against NTSC color space]
Ton+Toff (10% ←→ 90%)
25ms (typ.)
At IBL= 5.0mArms / lamp
650cd/m2 (typ.)
6-bit digital signals for data of RGB colors,
Dot clock (CLK), Data enable (DE),
Horizontal synchronous signal (Hsync),
Vertical synchronous signal (Vsync)
LCD panel signal processing board: 3.3V or 5.0V
Edge light type: 2 cold cathode fluorescent lamps
Backlight
Replaceable part
• Lamp holder set: Type No. 65LHS10
Power consumption
Recommended inverter (Option)
• Inverter: Type No. 65PW061
At IBL= 5.0mArms / lamp, Checkered flag pattern
4.4W (typ., Power dissipation of the inverter is not included.)
DATA SHEET DOD-PD-1362 (1st edition)
5
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4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 LCD panel signal processing board
VCC
Note1
3.0V or 4.75V
0V
ON
Tr < 30ms
Display signals
Function signal
Note2
0V
0ms < t < 35ms
VALID period
NL6448BC20-20
OFF ON
Toff > 50ms
0ms < t < 35ms
Note1: In terms of voltage variation (voltage drop) while VCC rising edge is below 3.0V in "VCC
= 3.3V" or 4.75V in "VCC = 5.0V", a protection circuit may work, and then this product
may not work.
Note2: Display signals (CLK, Hsync, Vsync, DE, R0 to R5, G0 to G5, B0 to B5) and function
signal (DPS) must be Low or High-impedance, exclude the VALID period (See above
sequence diagram), in order to avoid that internal circuits is damaged.
If some of display and function signals of this product are cut while this product is
working, even if the signal input to it once again, it might not work normally. VCC should
be cut when the display and function signals are stopped.
4.4.2 Inverter (Option)
Display signals
Function signals
Note1
Note2
VALID period
VDDB
Note1: These are the display and function signals for LCD panel signal processing board.
Note2: The backlight should be turned on within the valid period of display and function signals, in
order to avoid unstable data display.
DATA SHEET DOD-PD-1362 (1st edition)
11
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