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PDF NL6448BC26-26 Data sheet ( Hoja de datos )
| Número de pieza | NL6448BC26-26 | |
| Descripción | LCD Module | |
| Fabricantes | NEC | |
| Logotipo |  |
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TFT COLOR LCD MODULE
NL6448BC26-26
21cm (8.4 Type)
VGA
PRELIMINARY DATA SHEET
DOD-PP-0705 (1st edition)
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PP-0705 (1st edition)
www.DPuatbaliSshheeedt4dUa.tnee: tJanuary 2009 CP(N)
1 © NEC LCD Technologies, Ltd.
2009 All rights reserved.
1 page  
NL6448BC26-26
2. GENERAL SPECIFICATIONS
Display area
Diagonal size of display
Drive system
Display color
Pixel
Pixel arrangement
Dot pitch
Pixel pitch
Module size
Weight
Contrast ratio
Viewing angle
Designed viewing direction
Polarizer surface
Polarizer pencil-hardness
Color gamut
Response time
Luminance
Signal system
Power supply voltage
170.88 (H) × 128.16 (V) mm
21cm (8.4inches)
a-Si TFT active matrix
262,144 colors
640 (H) × 480 (V) pixels
RGB (Red dot, Green dot, Blue dot) vertical stripe
0.089 (H) × 0.267 (V) mm
0.267 (H) × 0.267 (V) mm
200.0 (W) × 152.0 (H) × 10.5 (D) mm (typ.)
(330) g (typ.)
(600):1 (typ.)
At the contrast ratio ≥10:1
• Horizontal: Right side 80° (typ.), Left side 80° (typ.)
• Vertical: Up side 80° (typ.), Down side 60° (typ.)
At DPS= Low or open: Normal scan
• Viewing direction without image reversal: up side (12 o'clock)
• Viewing direction with contrast peak: down side (6 o'clock)
• Viewing angle with optimum grayscale (γ≒2.2): normal axis
(perpendicular)
Clear
3H (min.) [by JIS K5400]
At LCD panel center
40 % (typ.) [against NTSC color space]
Ton+Toff (10%←→ 90%)
25 ms (typ.)
At IL=50mA
(450) cd/m2 (typ.)
6-bit digital signals for data of RGB colors,
Dot clock (CLK), Data enable (DE),
Horizontal synchronous signal (Hsync),
Vertical synchronous signal (Vsync)
LCD panel signal processing board: 3.3V or 5.0V
LED backlight type:
Backlight
Replaceable part
• Lamp holder set: Type No. TBD
Power consumption
At IL=50mA, Checkered flag pattern
(4.0) W (typ.)
PRELIMINARY DATA SHEET DOD-PP-0705 (1st edition)
5
5 Page 
4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 LCD panel signal processing board
VCC
Note1
3.0V or 4.75V
0V
ON
10μs ≤ Tr < 30ms
Display signals,
Function signal
Note2
0V
0ms < t < 35ms
VALID period
NL6448BC26-26
OFF ON
Toff > 50ms
0ms < t < 35ms
Note1: In terms of voltage variation (voltage drop) while VCC rising edge is below 3.0V in "VCC =
3.3V" or 4.75V in "VCC = 5.0V", a protection circuit may work, and then this product may
not work.
Note2: Display signals (CLK, Hsync, Vsync, DE, DATA (R0 to R5, G0 to G5 and B0 to B5)) and
function signal (DPS) must be Low or High-impedance, exclude the VALID period (See
above sequence diagram), in order to avoid that internal circuits is damaged.
If some of display and function signals of this product are cut while this product is working,
even if the signal input to it once again, it might not work normally. VCC should be cut when
the display and function signals are stopped.
4.4.2 Backlight lighting circuit
Display signals,
Function signal
Note1
Note2
VALID period
LED backlight: ON
Note1: These are the display and function signals for LCD panel signal processing board.
Note2: The backlight should be turned on within the valid period of display and function signals, in
order to avoid unstable data display.
PRELIMINARY DATA SHEET DOD-PP-0705 (1st edition)
11
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet NL6448BC26-26.PDF ] | |
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