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PDF NL6448BC20-21C Data sheet ( Hoja de datos )
| Número de pieza | NL6448BC20-21C | |
| Descripción | LCD Module | |
| Fabricantes | NEC | |
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TFT COLOR LCD MODULE
NL6448BC20-21C
17cm (6.5 Type)
VGA
PRELIMINARY DATA SHEET
DOD-PP-0321 (2nd edition)
This PRELIMINARY DATA SHEET is updated
document from DOD-PP-0269(1).
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PP-0321 (2nd edition)
www.DPuatbaliSshheeedt4dUa.tnee: tJuly 2007 CP(N)
1 © NEC LCD Technologies, Ltd.
2007 All rights reserved.
1 page  
NL6448BC20-21C
2. GENERAL SPECIFICATIONS
Display area
Diagonal size of display
Drive system
Display color
Pixel
Pixel arrangement
Dot pitch
Pixel pitch
Module size
Weight
Contrast ratio
Viewing angle
Designed viewing direction
Polarizer surface
Polarizer pencil-hardness
Color gamut
Response time
Luminance
Signal system
Power supply voltage
Backlight
Power consumption
132.48 (H) × 99.36 (V) mm
17cm (6.5 inches)
a-Si TFT active matrix
16,777,216 colors (At 8-bit input, FRC terminal= High)
262,144 colors (At 6-bit input, FRC terminal= Low or Open)
640 (H) × 480 (V) pixels
RGB (Red dot, Green dot, Blue dot) vertical stripe
0.0690 (H) × 0.2070 (V) mm
0.2070 (H) × 0.2070 (V) mm
153.0 (W) × 118.0 (H) × 9.0 (D) mm (typ.)
TBD g (typ.)
600:1 (typ.)
At the contrast ratio ≥10:1
• Horizontal: Right side 80° (typ.), Left side 80° (typ.)
• Vertical: Up side 80° (typ.), Down side 60° (typ.)
At DPS= Low or open: normal scan
• Viewing direction without image reversal: up side (12 o'clock)
• Viewing direction with contrast peak: down side (6 o'clock)
• Viewing angle with optimum grayscale (γ=2.2): normal axis
Clear + Antireflection (AR)
3H (min.) [by JIS K5400]
At LCD panel center
(36) % (typ.) [against NTSC color space]
Ton+Toff (10%←→ 90%)
25 ms (typ.)
At IL= 10 mA
800 cd/m2 (typ.)
LVDS 1port
(Receiver: THC63LVDF84B, THine Electronics Inc. or equivalent)
8bit/6bit digital signals for data of RGB colors, Dot clock (CLK),
Data enable (DE)
LCD panel signal processing board: 3.3V
LED backlight type:
Replaceable part
• LED holder set: Type No. 65LHS13
At IL= 10 mA, Checkered flag pattern
TBD W (typ.)
2
2
2
PRELIMINARY DATA SHEET DOD-PP-0321 (2nd edition)
5
5 Page 
4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 LCD panel signal processing board
VCC
Note1
0V
ON
3.0V
10μs≤ Tr < 50ms
Display signals*
Function signals
Note2
0V
0ms < t < 35ms
VALID period
NL6448BC20-21C
OFF
ON
0.3V
Toff ≥ 50ms
0ms < t < 35ms
* These signals should be measured at the terminal of 100Ω resistance.
Note1: In terms of voltage variation (voltage drop) while VCC rising edge is below 3.0V, a protection
circuit may work, and then this product may not work.
Note2: Display signals (D0+/-, D1+/-, D2+/-, D3+/- and CLK+/-) and function signals (DPS, FRC
and MSL) must be Low or High-impedance, exclude the VALID period (See above sequence
diagram), in order to avoid that internal circuits is damaged.
If some of display and function signals of this product are cut while this product is working,
even if the signal input to it once again, it might not work normally. If customer stops the
display and function signals, they should be cut VCC.
4.4.2 LED lighting circuit
Display and
function signals
Note1
Note2
VALID period
LED backlight: ON
Note1: These are the display and function signals for LCD panel signal processing board.
Note2: The backlight should be turned on within the valid period of display and function signals, in
order to avoid unstable data display.
PRELIMINARY DATA SHEET DOD-PP-0321 (2nd edition)
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet NL6448BC20-21C.PDF ] | |
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