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PDF DS1342 Data sheet ( Hoja de datos )

Número de pieza DS1342
Descripción (DS1341 / DS1342) Low-Current I2C RTCs
Fabricantes Maxim Integrated Products 
Logotipo Maxim Integrated Products Logotipo



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19-4998; Rev 0; 10/09
Low-Current I2C RTCs for High-ESR Crystals
General Description
The DS1341/DS1342 low-current real-time clocks (RTCs)
are timekeeping devices that provide an extremely low
standby current, which permits longer life from a power
supply. The DS1341/DS1342 support high-ESR crystals,
which broaden the pool of usable crystals for the devices.
The DS1341 uses a 6pF crystal, while the DS1342 uses a
12.5pF crystal. These devices are accessed through an
I2C serial interface. Other features include two time-of-day
alarms, two interrupt outputs, a programmable square-
wave output, and a serial bus timeout mechanism.
The clock/calendar provides seconds, minutes, hours,
day, date, month, and year information. The date at the
end of the month is automatically adjusted for months
with fewer than 31 days, including corrections for leap
year. The clock operates in either 24hr or 12hr format
with an AM/PM indicator.
The DS1341/DS1342 also include an input for synchroni-
zation. When a reference clock (e.g., 60Hz power line or
GPS 1PPS) is present at the CLKIN pin and the enable
external clock input bit (ECLK) is set to 1, the DS1341/
DS1342 RTCs are frequency-locked to the external clock
and the clock accuracy is determined by the external
source. In case of external clock failure, the clock is
switched to the crystal oscillator.
The devices are available in a lead(Pb)-free/RoHS-
compliant, 8-pin FSOP package. The devices support a
-40NC to +85NC extended temperature range.
Medicalwww.DataSheet4U.net
Point of Sale (POS)
Telematics
Applications
Portable Instruments
Portable Audio
Automotive
Typical Operating Circuit
VCC VCC
RPU RPU RPU
CPU
SCL VCC
SDA
CLKIN/INTA
SQW/INTB
X1
X2
DS1341/DS1342
GND
Features
S Low Timekeeping Current of 250nA (typ)
S Compatible with Crystal ESR Up to 80kI
S Use Crystals with CL = 6pF (DS1341) or
CL = 12.5pF (DS1342)
S +1.8V to +5.5V Operating Voltage Range
S Maintain Time Down to +1.15V (typ)
S Fast (400kHz) I2C Interface
S Bus Timeout for Lockup-Free Operation
S RTC Counts Seconds, Minutes, Hours, Day, Date,
Month, and Year with Leap Year Compensation
Valid Through 2099
S External Clock Source for Synchronization Clock
Reference (e.g., 32kHz, 50Hz/60Hz Power Line,
GPS 1PPS)
S Two Time-of-Day Alarms with Two Interrupt
Outputs
S Programmable Square-Wave Output
S Industrial Temperature Range
S Small, 8-Pin µSOP Package
Ordering Information
PART
TEMP RANGE
PIN-
PACKAGE
OSC
CL (pF)
DS1341U+
DS1341U+T&R
DS1342U+*
DS1342U+T&R*
-40NC to +85NC
-40NC to +85NC
-40NC to +85NC
-40NC to +85NC
8 FSOP
8 FSOP
8 FSOP
8 FSOP
6
6
12.5
12.5
+Denotes a lead(Pb)-free/RoHS-compliant package.
T&R = Tape and reel.
*Future product—contact factory for availability.
Pin Configuration
TOP VIEW
X1 1 +
X2
CLKIN/INTA
GND
2
3
4
DS1341
DS1342
µSOP
8 VCC
7 SQW/INTB
6 SCL
5 SDA
________________________________________________________________ Maxim Integrated Products   1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

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DS1342 pdf
Low-Current I2C RTCs for High-ESR Crystals
Functional Diagram
VCC
DS1341/DS1342
32.768kHz
8.192kHz
P
4.096kHz
MUX/
BUFFER
SQW/INTB
X1
/4
/2
/32 128Hz
EXTSYNC OSC-1Hz
N
EXT-1Hz
X2 DIVIDER
CONTROL LOGIC
CLKIN/INTA
SCL SERIAL BUS
SDA
INTERFACE AND
ADDRESS
N REGISTER
OSC-1Hz
ALARM AND
CONTROL REGISTERS
CLOCK AND
CALENDAR REGISTERS
N
PIN
1
2
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3
4
5
6
7
8
NAME
X1
X2
CLKIN/INTA
GND
SDA
SCL
SQW/INTB
VCC
Pin Description
FUNCTION
Connections for a Standard 32.768kHz Quartz Crystal. The internal oscillator circuitry is
designed for operation with a crystal having a specified load capacitance (CL) of 6pF (DS1341)
or 12.5pF (DS1342).
Clock Input/Active-Low Interrupt Output. This I/O pin is used to output an alarm interrupt or
accept an external clock input to drive the RTC counter. In the output mode, this is an open
drain and requires an external pullup resistor. If not used, connect this pin to ground.
Ground
Serial-Data Input/Output. SDA is the input/output pin for the I2C serial interface. The SDA pin is
open drain and requires an external pullup resistor.
Serial-Clock Input. SCL is used to synchronize data movement on the serial interface.
Square-Wave/Active-Low Interrupt Output. This pin is used to output a programmable square
wave or an alarm interrupt signal. This is a CMOS push-pull output and does not require an
external pullup resistor. If not used, this pin can be left unconnected.
DC Power Input. This pin should be decoupled using a 0.01FF or 0.1FF capacitor.
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DS1342 arduino
Low-Current I2C RTCs for High-ESR Crystals
BIT 7
OSF
1
BIT 6
DOSF
0
BIT 5
LOS
1
BIT 4
CLKSEL2
0
Control/Status Register Bitmap (0Fh)
BIT 3
CLKSEL1
0
BIT 2
ECLK
0
BIT 1
A2F
X
BIT 0
A1F
X
Control/Status Register (0Fh)
Bit 7: Oscillator Stop Flag (OSF). If the OSF bit is a 1,
that indicates the oscillator has stopped or was stopped
for some period of time, and could be used to judge
the validity of the clock and calendar data. This bit is
edge triggered and is set to 1 when the internal circuitry
senses the oscillator has transitioned from a normal run
state to a STOP condition. The following are examples of
conditions that can cause the OSF bit to be set:
1) Power is applied for the first time.
2) The voltage present on VCC is insufficient to support
oscillation.
3) The EOSC bit is turned off.
4) There are external influences on the crystal (e.g.,
noise, leakage, etc.).
This bit remains at 1 until written to 0. Attempting to write
OSF to 1 leaves the value unchanged.
Bit 6: Disable Oscillator Stop Flag (DOSF). This bit,
when set to 1, disables the sensing of the oscillator
conditions that would set the OSF bit. OSF remains
at 0 regardless of what happens to the oscillator.
This bit is cleared (0) when power is first applied.
Disabling the oscillator sensing is useful in reducing
power consumption.www.DataSheet4U.net
Bit 5: Loss of Signal (LOS). This status bit indicates the
state of the CLKIN pin. The bit is set to 1 when the RTC
counter is no longer conditioned by the external clock.
This happens when ECLK = 0, or when the clock signal
at CLKIN stops toggling, or when the CLKIN frequency
differs more than Q0.8% from the selected input fre-
quency. This bit remains at 1 until written to 0. Attempting
to write LOS to 1 leaves the value unchanged. Clearing
the LOS flag when the CLKIN frequency is invalid inhibits
subsequent detections of the input frequency deviation.
Bits 4 and 3: Select Clock Source (CLKSEL[2:1]).
These two register bits select the clock source to drive
the RTC counter. Table 6 lists the input frequencies that
can be selected. Upon power-up, the bits are cleared to
0 and the 1Hz rate is selected.
Table 6. Input Frequency Options
CLKSEL2
0
0
1
1
CLKSEL1
0
1
0
1
CLKIN/INTA
1Hz Input
50Hz Input
60Hz Input
32.768kHz Input
Bit 2: Enable External Clock Input (ECLK). This bit
controls the direction of the CLKIN/INTA pin (see Table
5). When the ECLK bit is 1, the CLKIN/INTA pin is an
input, with the expected input rate defined by the state
of CLKSEL2 and CLKSEL1 (see Table 6).
When the ECLK bit is 0, the CLKIN/INTA pin is an
interrupt output (see Table 5). If the INTCN bit is 0,
CLKIN/INTA contains the status of A1F (provided that
the A1IE bit is 1) or A2F (provided that the A2IE bit is 1).
If the INTCN bit is 1, CLKIN/INTA contains the status of
A1F (provided that the A1IE bit is 1).
This bit is set to 0 when power is first applied.
Bit 1: Alarm 2 Flag (A2F). A 1 in the alarm 2 flag bit
indicates that the time matched the alarm 2 registers.
This flag can be used to generate an interrupt on either
CLKIN/INTA or SQW/INTB depending on the status of
the INTCN bit in the Control register. If the INTCN bit is
set to 0 and A2F bit is a 1 (and A2IE bit is also 1), the
CLKIN/INTA pin goes low. If the INTCN bit is set to 1 and
A2F bit is 1 (and A2IE bit is also 1), the SQW/INTB pin
goes low. The A2F bit is cleared when written to 0. This
bit can only be written to 0. Attempting to write this bit to
1 leaves the value unchanged.
Bit 0: Alarm 1 Flag (A1F). A 1 in the alarm 1 flag bit
indicates that the time matched the alarm 1 registers. If
the A1IE bit is also 1, the CLKIN/INTA pin goes low. A1F
is cleared when written to 0. This bit can only be written
to 0. Attempting to write this bit to 1 leaves the value
unchanged.
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