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PDF KSZ8695PX Data sheet ( Hoja de datos )
| Número de pieza | KSZ8695PX | |
| Descripción | Integrated Multi-Port PCI Gateway Solution | |
| Fabricantes | Micrel Semiconductor | |
| Logotipo |  |
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KS8695PX
Integrated Multi-Port PCI Gateway Solution
Rev. 1.3
General Description
The CENTAUR KS8695PX, Multi-Port PCI Gateway Solution,
delivers a new level of networking integration, performance,
and overall BOM cost savings, enabling original equipment
manufacturers (OEMs) to provide customers with feature-
rich, low-cost solutions for the residential gateway and small
office environment.
• Integration of a PCI arbiter supporting one external mas-
ter.
– Allows incorporation of a variety of productivity en-
hancing system interfaces, including the expanding
802.11 a/g/b wireless LAN.
• High-performance ARMTM CPU (ARM9) with 8KB
I-cache, 8KB D-cache, and a memory management unit
(MMU) for Linux and WinCE® support.
• XceleRouterTM technology to accelerate packet process-
ing.
• Proven wire-speed switching technology that includes
802.1Q tag-based VLAN and quality of service (QoS)
support.
• Five patented mixed-signal, low-powered Fast Ethernet
transceivers with corresponding media access control
(MAC) units.
• Advanced memory interface with programmable
8/16/32-bit data and 22-bit address bus with up to 64MB
of total memory space for Flash, ROM, SRAM, SDRAM,
and external peripherals.
Functional Diagram
CENTAUR KS8695PX
Advanced Memory Controller
External I/O
Controller
FLASH/ROM/
SRAM
Controller
SDRAM
Controller
ARM9™
1 External
PCI Master
www.DataSheet4U.com
High Speed AMBA Bus
MMU
8KB 8KB
I-Cache D-Cache
PCI
Host
Bridge
XceleRouter™
APB
Bridge
Switch
Registers
High-Performance
Non-Blocking
5-Port Switch
Advanced Peripheral Bus (APB)
Interrupt
Controller
16 GPIOs
10/100
MAC
TX/FX
PHY
10/100
MAC
TX/FX
PHY
10/100
MAC
TX/RX
PHY
10/100
MAC
TX/RX
PHY
10/100
MAC
TX/RX
PHY
UART
Timer/
Watchdog
XceleRouter is a trademark of Micrel, Inc. AMD is a registered trademark of Advanced Micro Devices, Inc. ARM is a trademark of Advanced RISC Machines Ltd.
Intel is a registered trademark of Intel Corporation. WinCE is a registered trademark of Microsoft Corporation.
Micrel, Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
September 2005
1
M9999-091605
1 page  
KS8695PX
System Level Applications
HomePlug
PCMCIA
Cable
DSL
Fiber
Satellite
Wireless
Console
Port
Flash/ROM/
SRAM
Memory + External I/O
SDRAM
8/16/32 Bit
WAN I/F
10/100 TX/FX
Auto MDI-X
KS8695PX
Integrated Multi-Port
PCI
Gateway Solution
33MHz
PCI
802.11a/g/b/n
4-Port LAN
10/100 TX/FX
Auto MDI-X
Figure 1. KS8695PX PCI Gateway System Options
Micrel
www.DataSheet4U.com
September 2005
5
M9999-091605
5 Page 
KS8695PX
Micrel
Pin Number
P15
R15
B4
Pin Name
RCSN0
RCSN1
REQ1N
Type(1)
O
O
I
B3 NC —
B2 NC —
A17 RESETN I
T5
SDCASN
O
P5
SDCSN0
O
R4
SDCSN1
O
T7
SDICLK
I
U7
SDOCLK
O
U6
SDQM0
O
T6
SDQM1
O
R6
SDQM2
O
P6
SDQM3
O
R5
SDRASN
O
U5
SDWEN
O
A10
SERRN
O
D11
STOPN
I/O
G14 TCK I
F14 TDI I
F15
TDO
O
M4
TEST1
I
F4
TEST2
I
F17 TESTEN I
G15 TMS I
C10
TRDYN
I/O
F16 TRSTN I
M14 UCTSN/ I
BISTEN
L15 UDCDN/ I
SCANEN
M16 UDSRN I
N15
UDTRN/
O/I
DBGENN
L14 URIN/TSTRST I
M15
URTSN/
O/I
CPUCLKSEL
Pin Function
ROM/SRAM/FLASH Chip Select. Active Low.
ROM/SRAM/FLASH Chip Select. Active Low.
PCI Bus Request 1. Active Low. Input for Host Bridge Mode and Guest Bridge
Mode.
No Connect
No Connect
KS8695PX Chip Reset. Active Low.
SDRAM Column Address Strobe. Active Low.
SDRAM Chip Select. Active Low Chip Select Pins for SDRAM.
SDRAM Chip Select. Active Low Chip Select Pins for SDRAM.
SDRAM Clock In.
System/SDRAM Clock Out.
SDRAM Data Input/Output Mask.
SDRAM Data Input/Output Mask.
SDRAM Data Input/Output Mask.
SDRAM Data Input/Output Mask.
SDRAM Row Address Strobe. Active Low.
SDRAM Write Enable. Active Low.
PCI System Error Signal. Active Low.
PCI Stop Signal. Active Low.
JTAG Test Clock.
JTAG Test Data In.
JTAG Test Data Out.
PHY Test Pin (factory reserved test signal).
PHY Test Pin (factory reserved test signal).
Chip Test Enable (factory reserved test signal). Must be connected to GND for
normal operation
JTAG Test Mode Select
PCI Target Ready Signal. Active Low.
JTAG Test Reset. Active Low.
UART Data Set Ready. Active Low. BIST Enable (factory reserved test signal).
UART Data Carrier Detect. Scan Enable (factory reserved test signal).
UART Data Set Ready. Active Low.
UART Data Terminal Ready. Active Low. Debug Enable (factory reserved test .
signal)
UART Ring Indicator/Chip Test Reset (factory reserved test signal).
UART Request to Send/CPU Clock Select.
Note:
1. I = Input.
O = Output.
I/O = Bidirectional.
www.DOa/Ita=SOhueteptu4tUin.cnoomrmal mode; input pin during reset.
September 2005
11
M9999-091605
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet KSZ8695PX.PDF ] | |
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