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Número de pieza | KSZ8695P | |
Descripción | Integrated Multi-Port PCI Gateway Solution | |
Fabricantes | Micrel Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de KSZ8695P (archivo pdf) en la parte inferior de esta página. Total 42 Páginas | ||
No Preview Available ! KS8695P
Integrated Multi-Port PCI Gateway Solution
Rev. 1.5
General Description
The CENTAUR KS8695P, Multi-Port PCI Gateway
Solution, delivers a new level of networking integration,
performance, and overall BOM cost savings, enabling
original equipment manufacturers (OEMs) to provide
customers with feature-rich, low-cost solutions for the
residential gateway and small office environment.
• Integration of a PCI arbiter supporting three external
masters.
– Allows incorporation of a variety of productivity
enhancing system interfaces, including the expanding
802.11 a/g/b wireless LAN.
• High-performance ARM™ CPU (ARM9) with 8KB
I-cache, 8KB D-cache, and a memory management unit
(MMU) for Linux and WinCE® support.
• XceleRouter™ technology to accelerate packet
processing.
• Proven wire-speed switching technology that includes
802.1Q tag-based VLAN and quality of service (QoS)
support.
• Five patented mixed-signal, low-powered Fast Ethernet
transceivers with corresponding media access control
(MAC) units.
• Advanced memory interface with programmable 8/16/32-
bit data and 22-bit address bus with up to 64MB of total
memory space for Flash, ROM, SRAM, SDRAM, and
external peripherals.
Functional Diagram
Supports
up to
3 External
PCI Masters
www.DataSheet4U.com
XceleRouter is a trademark of Micrel, Inc. AMD is a registered trademark of Advanced Micro Devices, Inc. ARM is a trademark of Advanced RISC Machines Ltd.
Intel is a registered trademark of Intel Corporation. WinCE is a registered trademark of Microsoft Corporation.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
May 2006
M9999-051806
1 page Micrel, Inc.
System Level Applications
KS8695P
Figure 1. KS8695P PCI Gateway System Options
www.DataSheet4U.com
May 2006
5
M9999-051806
5 Page Micrel, Inc.
KS8695P
Pin Number
P15
Pin Name
RCSN0
Type(1) Pin Function
O ROM/SRAM/FLASH Chip Select. Active Low.
R15
RCSN1
O ROM/SRAM/FLASH Chip Select. Active Low.
B4
REQ1N
I PCI Bus Request 1. Active Low. Input for Host Bridge Mode and Guest
Bridge Mode.
B3
REQ2N
I PCI Bus Request 2. Active Low. Input for Host Bridge Mode, Not Used in
Guest Bridge Mode.
B2
REQ3N
I PCI Bus Request 3. Active Low. Input for Host Bridge Mode, Not Used in
Guest Mode
A17
RESETN
I KS8695P Chip Reset. Active Low.
T5
SDCASN
O SDRAM Column Address Strobe. Active Low.
P5
SDCSN0
O SDRAM Chip Select. Active Low Chip Select Pins for SDRAM.
R4
SDCSN1
O SDRAM Chip Select. Active Low Chip Select Pins for SDRAM.
T7
SDICLK
I SDRAM Clock In.
U7
SDOCLK
O System/SDRAM Clock Out.
U6
SDQM0
O SDRAM Data Input/Output Mask.
T6
SDQM1
O SDRAM Data Input/Output Mask.
R6
SDQM2
O SDRAM Data Input/Output Mask.
P6
SDQM3
O SDRAM Data Input/Output Mask.
R5
SDRASN
O SDRAM Row Address Strobe. Active Low.
U5
SDWEN
O SDRAM Write Enable. Active Low.
A10
SERRN
O PCI System Error Signal. Active Low.
D11
STOPN
I/O PCI Stop Signal. Active Low.
G14
TCK
I JTAG Test Clock.
F14 TDI I JTAG Test Data In.
F15
TDO
O JTAG Test Data Out.
M4
TEST1
I PHY Test Pin (factory reserved test signal).
F4
TEST2
I PHY Test Pin (factory reserved test signal).
F17
TESTEN
I Chip Test Enable (factory reserved test signal). Must be connected to GND
for normal operation.
G15
TMS
I JTAG Test Mode Select.
C10
TRDYN
I/O PCI Target Ready Signal. Active Low.
F16
M14
TRSTN
UCTSN/
BISTEN
I JTAG Test Reset. Active Low.
I UART Data Set Ready. Active Low. BIST Enable (factory reserved test
signal).
L15
UDCDN/
I UART Data Carrier Detect. Scan Enable (factory reserved test signal).
SCANEN
M16
UDSRN
I UART Data Set Ready. Active Low.
N15
UDTRN/
O/I UART Data Terminal Ready. Active Low. Debug Enable (factory reserved
DBGENN
test signal).
L14 URIN/TSTRST I UART Ring Indicator/Chip Test Reset (factory reserved test signal).
M15
URTSN/
www.DataSheet4U.coCmPUCLKSEL
O/I UART Request to Send/CPU Clock Select.
Note:
1. I = Input.
O = Output.
I/O = Bidirectional.
O/I = Output in normal mode; input pin during reset.
May 2006
11 M9999-051806
11 Page |
Páginas | Total 42 Páginas | |
PDF Descargar | [ Datasheet KSZ8695P.PDF ] |
Número de pieza | Descripción | Fabricantes |
KSZ8695P | Integrated Multi-Port PCI Gateway Solution | Micrel Semiconductor |
KSZ8695PX | Integrated Multi-Port PCI Gateway Solution | Micrel Semiconductor |
KSZ8695X | Integrated Multi-Port High-Performance Gateway Solution | Micrel Semiconductor |
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