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PDF TC74VHCV05FK Data sheet ( Hoja de datos )

Número de pieza TC74VHCV05FK
Descripción Hex Schmitt Inverter
Fabricantes Toshiba Semiconductor 
Logotipo Toshiba Semiconductor Logotipo



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No Preview Available ! TC74VHCV05FK Hoja de datos, Descripción, Manual

TC74VHCV05FT/FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHCV05FT,TC74VHCV05FK
Hex Schmitt Inverter (open drain)
The TC74VHCV05 is an advanced high speed CMOS INVERTER
fabricated with silicon gate CMOS technology.
It achieves the high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power
dissipation.
Output have high performance MOS N-channel transistor. (Open
Drain outputs)
Input pin have hysteresis between the positive-going and
negative-going thresholds. Thus the TC74VHCV05 is capable of
squaring up transitions of slowly changing input signals such as
line receivers.
Input protection and output circuit ensure that 0 to 5.5 V can be
applied to the input and output pin without regard to the supply
voltage. These structure prevents device destruction due to
mismatched supply and input/output voltages such as battery
back up, etc.
Features
High speed: tpZ = 4.2 ns (typ.) at VCC = 5 V
Low power dissipation: ICC = 2 μA (max) at Ta = 25°C
Wide operating voltage range: VCC (opr) = 1.8 V to 5.5 V
Ouput current: IOL = 16 mA (min) (VCC = 4.5 V)
Available in TSSOP and VSSOP (US)
Power-down protection provided on all inputs and outputs
Pin and function compatible with the 74 series
(74AC/VHC/HC/F/ALS/LS etc.) 05 type
TC74VHCV05FT
TC74VHCV05FK
Weight
TSSOP14-P-0044-0.65A
VSSOP14-P-0030-0.50
: 0.06 g ( typ )
: 0.02 g ( typ )
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1
2010-07-09

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TC74VHCV05FK pdf
TC74VHCV05FT/FK
AC Characteristics (input: tr = tf = 3 ns)
Characteristics
Propagation delay
time
Propagation delay
time
Input capacitance
Output capacitance
Power dissipation
capacitance
Symbol
tpZL
tpLZ
CIN
COUT
CPD
Test Condition
RL = 1 k
RL = 1 k
VCC (V)
2.5 ± 0.2
3.3 ± 0.3
5.0 ± 0.5
2.5± 0.2
3.3 ± 0.3
5.0 ± 0.5
CL (pF)
15
50
15
50
15
50
50
50
50
Ta = 25°C
Min Typ. Max
7.3 12.2
10.1 16.6
5.6 7.1
7.6 10.6
4.2 5.5
5.7 7.5
11.6 15.2
9.2 10.6
6.9 7.5
4 10
5
(Note) 4
Ta =
40 to 85°C
Min Max
1.0 15.0
1.0 19.5
1.0 8.5
1.0 12.0
1.0 6.5
1.0 8.5
1.0 18.0
1.0 12.0
1.0 8.5
10
――
――
Unit
ns
ns
pF
pF
pF
Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD·VCC·fIN + ICC/6 (per gate)
Noise Characteristics (input: tr = tf = 3 ns)
Characteristics
Symbol
Test Condition
Quiet output maximum dynamic VOL
VOLP
CL = 50 pF
Quiet output minimum dynamic VOL
Minimum high level dynamic input voltage
Maximum low level dynamic input voltage
VOLV
VIHD
VILD
CL = 50 pF
CL = 50 pF
CL = 50 pF
VCC (V)
3.3
5.0
3.3
5.0
5.0
5.0
Ta = 25°C
Typ. Limit
0.3
0.6
0.1
0.2
3.5
1.5
Unit
V
V
V
V
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