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PDF PCS3P73U00A Data sheet ( Hoja de datos )

Número de pieza PCS3P73U00A
Descripción USB 2.0 Peak EMI reduction IC
Fabricantes ON Semiconductor 
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No Preview Available ! PCS3P73U00A Hoja de datos, Descripción, Manual

May 2008
rev 0.3
USB 2.0 Peak EMI reduction IC
PCS3P73U00A
General Features
1x Peak EMI Reduction IC
Input frequency:
10MHz - 60MHz @ 2.5V
10MHz - 70MHz @ 3.3V
Output frequency:
10MHz - 60MHz @ 2.5V
10MHz - 70MHz @ 3.3V
Supply Voltage: 2.5V±0.2V
3.3V ±0.3V
Analog Spread Selection up to ±0.5%
ModRate selection option
Commercial temperature range
8pin TSSOP, SOIC and TDFN(2X2) COL Package
Conforms to USB2.0 compliance standards
The First True Drop-in Solution
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coupled to XIN / CLKIN) and locks on to it delivering a 1x
modulated clock output. PCS3P73U00A has a Frequency
Selection (FS) control that facilitates selecting one of the
two frequency ranges within the operating frequency range.
Refer to the frequency Selection table for details.
PCS3P73U00A has an SSEXTR pin to select different
deviations depending upon the value of an external resistor
connected between SSEXTR and GND. Modulation Rate
(MR) control selects two different Modulation Rates.
PCS3P73U00A operates from a 3.3V / 2.5V supply and is
available in an 8 pin TSSOP, SOIC, and TDFN(2X2) COL
packages, over Commercial temperature range.
Applications
Product Description
PCS3P73U00A is a versatile, 3.3V / 2.5V Peak EMI
reduction IC. PCS3P73U00A accepts an input clock either
from a Crystal or from an external reference (AC or DC
PCS3P73U00A is targeted for USB applications.
Refer to SSEXTR Resistance Table for USB2.0
compliance for commonly used frequencies.
Block Diagram
FS VDD SSEXTR
XIN / CLKIN
XOUT
Crystal
Oscillator
PLL
ModOUT
MR GND
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200 Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018
www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.

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PCS3P73U00A pdf
May 2008
rev 0.3
PCS3P73U00A
R
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Crystal
C1 = 27 pF
R1 = 510
C2 = 27 pF
Fig1: Typical Crystal Interface Circuit
Note: For AC Coupled Interface refer to Application Brief:CT100801
Typical Crystal Specifications
Fundamental AT cut parallel resonant crystal
Nominal frequency
Frequency tolerance
Operating temperature range
Storage temperature
Load capacitance
Shunt capacitance
ESR
48MHz
± 50 ppm or better at 25°C
-25°C to +85°C
-40°C to +85°C
18pF
7pF maximum
25
RCompliance
The value of the compliance resistor , RCompliance sets the
USB2.0 signaling rate (frequency) deviation to 1000ppm
peak-to-peak (+/-500ppm). It causes a -4dB peak power
EMI reduction at the 480MHz fundamental USB2.0
frequency. Higher harmonics are reduced more.
If the RCompliance is set to a lower value than its
compliance limit, it will set the USB2.0 signaling rate
(frequency) deviation to above 1000ppm peak-to-peak.
For settings above 1000ppm the USB2.0 compliance
pass/fail becomes gradually intermittent. USB2.0
functionality is maintained upto 3000ppm peak-to-peak
signaling rate (frequency) deviation. The EMI tradeoff in
the system is attenuation/compliance. While fully
functional (and compliant intermittent) the 2000ppm
frequency deviation can provide -7dB of EMI attenuation
at the 480MHz fundamental.
USB 2.0 Peak EMI reduction IC
Notice: The information in this document is subject to change without notice.
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PCS3P73U00A arduino
May 2008
rev 0.3
TDFN COL 2x2 8L package Outline drawing
PCS3P73U00A
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Symbol
A
A3
b
D
E
e
L
Dimensions
Inches
Millimeters
Min
Max
Min
Max
0.027
0.0315
0.70
0.80
0.008 BSC
0.203 BSC
0.008
0.012
0.20
0.30
0.079 BSC
2.00 BSC
0.078 BSC
2.00 BSC
0.020 BSC
0.50 BSC
0.020
0.024
0.50
0.60
USB 2.0 Peak EMI reduction IC
Notice: The information in this document is subject to change without notice.
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