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PDF PCS3P7303A Data sheet ( Hoja de datos )
| Número de pieza | PCS3P7303A | |
| Descripción | General Purpose Peak EMI Reduction IC | |
| Fabricantes | ON Semiconductor | |
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PCS3P7303A
General Purpose Peak EMI
Reduction IC
General Features
• 1x, LVCMOS Peak EMI Reduction
• Input frequency:
10MHz - 70MHz @ 2.5V
10MHz - 80MHz @ 3.3V
• Output frequency:
10MHz - 70MHz @ 2.5V
10MHz - 80MHz @ 3.3V
• Analog Deviation Selection
• ModRate selection option
• Supply Voltage: 2.5V ± 0.2V
3.3V ± 0.3V
• 8-pin TSSOP, 8L 2mmX2mm WDFN(TDFN) Packages
• The First True Drop-in Solution
Functional Description
PCS3P7303A is a versatile, 3.3V/2.5V Peak EMI reduction
IC based on Timing-Safe™ technology. PCS3P7303A
accepts an input clock either from a Crystal or from an
external reference (AC or DC coupled to XIN / CLKIN) and
www.DataSheet4U.com
locks on to it delivering a 1x modulated clock output.
PCS3P7303A has a Frequency Selection (FS) control that
facilitates selecting one of the two frequency ranges within
the operating frequency range. Refer to the Frequency
Selection Table for details.
PCS3P7303A has an SSEXTR pin to select different
deviations depending upon the value of an external resistor
connected between SSEXTR and GND. Modulation Rate
(MR) control selects two different Modulation Rates.
PCS3P7303A operates from a 3.3V/2.5V supply and is
available in an 8-pin TSSOP and 8L 2mmX2mm WDFN
packages.
Application
PCS3P7303A is targeted for many applications including
USB and SATA.
Block Diagram
FS MR
VDD
XIN / CLKIN
XOUT
Crystal
Oscillator
PLL
ModOUT
GND
©2010 SCILLC. All rights reserved.
JANUARY 2010 – Rev. 2
SSEXTR
Publication Order Number:
PCS3P7303/D
1 page  
PCS3P7303A
Switching Characteristics for 3.3V
Parameter
Test Conditions
Min
Input Frequency1 / ModOUT FS=0
FS=1
Duty Cycle 2, 3
Measured at VDD /2
Output Rise Time 2, 3
Measured between 20% to 80%
Output Fall Time 2, 3
Measured between 80% to 20%
10
30
45
Cycle-to-Cycle Jitter 3
Unloaded output
FS=0
FS=1
10MHz
40MHz
30MHz
80MHz
PLL Lock Time 3
Stable power supply, valid clock presented on
XIN / CLKIN
Notes: 1. Functionality with Crystal is guaranteed by design and characterization. Not 100% tested in production.
2. All parameters are specified with10pF loaded outputs.
3. Parameter is guaranteed by design and characterization. Not 100% tested in production.
Typ
50
1.3
0.9
±450
±125
±225
±125
Max Unit
40
MHz
ww80w.DataSheet4U.com
55 %
2 nS
1.3 nS
±600
±250
±350
pS
±250
3 mS
Typical Crystal Specifications
Fundamental AT cut parallel resonant crystal
Nominal frequency
25MHz
Frequency tolerance
±50ppm or better at 25°C
Operating temperature range
-25°C to +85°C
Storage temperature
-40°C to +85°C
Load capacitance(CP)
18pF
Shunt capacitance
7pF maximum
ESR
25 Ω
Note: CL is the Load Capacitance and R1 is used to prevent oscillations at overtone frequency of the Fundamental frequency.
Typical Crystal Interface Circuit
PCS3P7303A
R
XIN / CLKIN
Crystal
XOUT
R1
CL CL
CL = 2*(CP – CS),
Where CP = Load capacitance of crystal from crystal vendor datasheet.
CS = Stray capacitance due to CIN, PCB, Trace, etc.
Rev. 2 | Page 5 of 10 | www.onsemi.com
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet PCS3P7303A.PDF ] | |
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