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PDF PCS3P2042B Data sheet ( Hoja de datos )

Número de pieza PCS3P2042B
Descripción LCD Panel EMI Reduction IC
Fabricantes ON Semiconductor 
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PCS3P2042B
LCD Panel EMI Reduction IC
Features
FCC approved method of EMI attenuation.
Provides up to 15dB of EMI suppression.
Generates a low EMI spread spectrum clock of the
input frequency.
Input frequency range: 30MHz - 110MHz.
Output frequency range: 30MHz - 110MHz
Optimized for 32.5MHz, 54MHz, 65MHz, 74MHz and
108MHz pixel clock frequencies.
Internal loop filter minimizes external components and
board space.
Eight selectable high spread ranges up to ±2%.
Selectable spread options: Down Spread and Center
Spread
SSON# control pin for spread spectrum enable and
disable options.
Low cycle-to-cycle jitter.
3.3V ± 0.3V operating range.
CMOS design.
Supports most mobile graphic accelerator and LCD
timing controller specifications.
Available in 8-pin TSSOP Package.
Product Description
The PCS3P2042B is a versatile swprweawd.DastpaeSchteruemt4U.com
frequency modulator designed specifically for digital flat
panel applications. The PCS3P2042B reduces
electromagnetic interference (EMI) at the clock source,
allowing system wide reduction of EMI of down stream
clock and data dependent signals. The PCS3P2042B
allows significant system cost savings by reducing the
number of circuit board layers ferrite beads, shielding and
other passive components that are traditionally required to
pass EMI regulations.
The PCS3P2042B uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.
The PCS3P2042B modulates the output of a single PLL in
order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation.’
Applications
The PCS3P2042B is targeted towards digital flat panel
applications for notebook PCs, palm-size PCs, office
automation equipments and LCD monitors.
Block Diagram
SR0 CP1 CP0 SSON#
VDD
CLKIN
Frequency
Divider
Feedback
Divider
Modulation
Phase
Detector
Loop
Filter
PLL
VCO
Output
Divider
ModOUT
©2010 SCILLC. All rights reserved.
JANUARY 2010 – Rev. 2
VSS
Publication Order Number:
PCS3P2042/D

1 page




PCS3P2042B pdf
PCS3P2042B
DC Electrical Characteristics
Symbol
Parameter
VIL Input low voltage
VIH Input high voltage
IIL
Input low current
(pull-up resistor on inputs CP0, CP1 and SR0)
IIH Input high current (pull-down resistor on input SSON#)
VOL Output low voltage ( IOL = 8mA)
VOH Output high voltage ( IOH = -8mA)
IDD Static supply current (CLKIN pulled LOW)
ICC Dynamic supply current (3.3V and 10pF loading)
VDD Operating voltage
tON Power-up time (first locked cycle after power up)
ZOUT Clock output impedance
Min
VSS - 0.3
2.0
2.5
6
3.0
AC Electrical Characteristics
Symbol
Parameter
fIN Input Clock frequency
fOUT Output Clock frequency
tLH1 Output rise time (measured between 20% to 80%)
tHL1 Output fall time (measured between 80% to 20%)
<50MHz
tJC Jitter (cycle-to-cycle)
50MHz
tD Output duty cycle
Note: 1. tLH and tHL are measured into a capacitive load of 10pF
Min
30
30
1.1
0.8
45
Typ Max Unit
0.8 V
VDD + 0.3
V
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-50 µA
50 µA
0.4 V
V
300 µA
15 22 mA
3.3 3.6 V
3 mS
35
Typ Max Unit
74 110 MHz
74 110 MHz
1.5 2 nS
1.2 1.8 nS
±250
±200
pS
50 55 %
Rev. 2 | Page 5 of 7 | www.onsemi.com

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