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PDF NTP18N06 Data sheet ( Hoja de datos )
| Número de pieza | NTP18N06 | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
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NTP18N06, NTB18N06
Power MOSFET
15 A, 60 V, N−Channel TO−220 & D2PAK
Designed for low voltage, high speed switching applications in
power supplies, converters and power motor controls and bridge
circuits.
N−Channel
Typical Applications
D
• Power Supplies
• Converters
• Power Motor Controls
• Bridge Circuits
• Pb−Free Packages are Available
G
S
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage
Drain−to−Gate Voltage (RGS = 10 mW)
Gate−to−Source Voltage
− Continuous
− Non−Repetitive (tp v 10 ms)
Drain Current
− Continuous @ TC = 25°C
− Continuous @ TC = 100°C
− Single Pulse (tp v 10 ms)
Total Power Dissipation @ TC = 25°C
Derate above 25°C
VDSS
VDGR
VGS
60
60
"20
"30
Vdc
Vdc
Vdc
ID 15 Adc
ID 8.0 Adc
IDM 45 Apk
PD 48.4 W
0.32 W/°C
Operating and Storage Temperature Range
TJ, Tstg −55 to °C
+175
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc, VDS = 60 Vdc,
IL(pk) = 11 A, L = 1.0 mH, RG = 25 W)
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient
Maximum Lead Temperature for Soldering
Purposes, (1/8″ from case for 10 s)
EAS 61 mJ
RqJC
RqJA
TL
°C/W
3.1
72.5
260 °C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
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V(BR)DSS
60 V
RDS(on) TYP
90 mW @ 10 V
ID MAX
15 A
4
1
2
3
TO−220AB
CASE 221A
STYLE 5
4
12
3
D2PAK
CASE 418AA
STYLE 2
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
4
Drain
NTx18N06G
AYWW
1
Gate
3
Source
2
Drain
NTx
18N06G
AYWW
12 3
Gate Drain Source
NTx18N06
x
A
Y
WW
G
= Device Code
= B or P
= Assembly Location
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2005
August, 2005 − Rev. 4
1
Publication Order Number:
NTP18N06/D
1 page  
NTP18N06, NTB18N06
12
10
8
Q1
6
4
QT
Q2
VGS
1000
VDS = 30 V
ID = 15 A
VGS = 10 V
tr
10 td(off)
tf
td(on)
www.DataSheet4U.com
2 ID = 15 A
TJ = 25°C
0
0 2 4 6 8 10 12
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage versus Total Charge
1
1 10
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
DRAIN−TO−SOURCE DIODE CHARACTERISTICS
16
VGS = 0 V
TJ = 25°C
12
100
8
4
0
0.6 0.68 0.76 0.84 0.92
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
1
Figure 10. Diode Forward Voltage versus Current
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
the maximum simultaneous drain−to−source voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (TC) of 25°C.
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal Resistance −
General Data and Its Use.”
Switching between the off−state and the on−state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded and the
transition time (tr,tf) do not exceed 10 ms. In addition the total
power averaged over a complete switching cycle must not
exceed (TJ(MAX) − TC)/(RqJC).
A Power MOSFET designated E−FET can be safely used
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non−linearly with an
increase of peak current in avalanche and peak junction
temperature.
Although many E−FETs can withstand the stress of
drain−to−source avalanche at currents up to rated pulsed
current (IDM), the energy rating is specified at rated
continuous current (ID), in accordance with industry custom.
The energy rating must be derated for temperature as shown
in the accompanying graph (Figure 12). Maximum energy at
currents below rated continuous ID can safely be assumed to
equal the values indicated.
http://onsemi.com
5
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| PDF Descargar | [ Datasheet NTP18N06.PDF ] | |
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