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PDF GDM1602K Data sheet ( Hoja de datos )
| Número de pieza | GDM1602K | |
| Descripción | 5x8 dots LCD Module | |
| Fabricantes | XIAMEN OCULAR | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de GDM1602K (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
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GDM1602K
Features
1. 5x8 dots with cursor
2. Built-in controller (KS0066U or equivalent)
3. Easy interface with 4-bit or 8-bit MPU
4. +5V power supply (also available for =3.0V)
5. 1/16 duty cycle
6. N.V. optional
7. BKL to be driven by pin1, pin2, or pin15, pin16 or A, K
Outline dimension
SPECIFICATIONS OF
LCD MODULE
EL BKL/ or
without BKL
LED BKL
Absolute maximum ratings
Item
Symbol
Power voltage
VDD-VSS
Input voltage
VIN
Operating temperature range
VOP
Storage temperature range
VST
*Wide temperature range is available
(operating/storage temperature as –20~+70/-30~+80
Display Pattern
Standard
0 - 7.0
VSS - VDD
0 - +50
-20 - +60
Unit
V
1 page  
GDM1602K
Busy flag check must be preceded by the next instruction.
Instruction Table
Instruction code
Instruction RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Description
Clear
Display
0
Return
Home
0
Entry mode
Set
Display ON/
OFF control
0
0
Cursor or
Display shift
0
Function set 0
Set CGRAM
Address
Set DDRAM
Address
Read busy
Flag and
Address
Write data to
Address
Read data
From RAM
0
0
0
1
1
Write “20H” to DDRA and set
0 0 0 0 0 0 0 0 1 DDRAM address to “00H” from
AC
Set DDRAM address to “00H”
From AC and return cursor to
0 0 0 0 0 0 0 1 - Its original position if shifted.
The contents of DDRAM are not
changed.
Assign cursor moving direction
0 0 0 0 0 0 1 I/D SH And blinking of entire display
Set display (D), cursor (C), and
0 0 0 0 0 1 D C B Blinking of cursor (B) on/off
Control bit.
Set cursor moving and display
0
0
0
0
1 S/C R/L -
-
Shift control bit, and the
Direction, without changing of
DDRAM data.
Set interface data length (DL: 8-
0
0
0
1 DL N F
-
-
Bit/4-bit), numbers of display
Line (N: =2-line/1-line) and,
Display font type (F: 5x11/5x8)
Set CGRAM address in address
0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 Counter.
Set DDRAM address in address
0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0 Counter.
Whether during internal
1
BF
AC6 AC5
AC4 AC3 AC2
AC1
AC0
Operation or not can be known
By reading BF. The contents of
Address counter can also be read.
Write data into internal RAM
0 D7 D6 D5 D4 D3 D2 D1 D0 (DDRAM/CGRAM).
Read data from internal RAM
1 D7 D6 D5 D4 D3 D2 D1 D0 (DDRAM/CGRAM).
Execution
time (fosc=
270 KHZ
1.53ms
1.53ms
39us
39us
39us
39us
39us
0us
43us
43us
NOTE:
When an MPU program with checking the busy flag (DB7) is made, it must be necessary 1/2fosc is
necessary for executing the next instruction by the falling edge of the “E” signal after the busy flag (DB7)
goes to “Low”.
Contents
1) Clear display
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 0 0 01
Clear all the display data by writing “20H” (space code) to all DDRAM address, and set DDRAM
address to “00H” into AC (address counter).
Return cursor to the original status, namely, bring the cursor to the left edge on the fist line of the
display.
Make the entry mode increment (I/D=“High”).
V: A
5/9 2001/12/05
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet GDM1602K.PDF ] | |
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