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PDF TC7MH257FK Data sheet ( Hoja de datos )
| Número de pieza | TC7MH257FK | |
| Descripción | Quad 2-Channel Multiplexer | |
| Fabricantes | Toshiba Semiconductor | |
| Logotipo |  |
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TC7MH257FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC7MH257FK
Quad 2-Channel Multiplexer (3-State)
The TC7MH257FK is an advanced high speed CMOS
multiplexer fabricated with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent
bipolar schottky TTL while maintaining the CMOS low power
dissipation.
It is composed of four independent 2-channel multiplexers with
common SELECT and OUTPUTENABLE (OE).
If OE is set low, the outputs are held in a high-impedance state.
When SELECT is set low, “A” data inputs are enabled.
Conversely, when SELECT is high, “B” data inputs are
enabled.
An input protection circuit ensures that 0 to 5.5 V can be
applied to the input pins without regard to the supply voltage.
Weight: 0.02 g (typ.)
This device can be used to interface 5 V to 3 V systems and two
supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and
input voltages.
Features
• High speed: tpd = 3.6 ns (typ.) (VCC = 5 V)
• Low power dissipation: ICC = 4 μA (max) (Ta = 25°C)
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Power down protection is provided on all inputs.
• Balanced propagation delays: tpLH ≈ tpHL
• Wide operating voltage range: VCC (opr) = 2~5.5 V
• Low noise: VOLP = 0.8 V (max)
• Pin and function compatible with 74ALS257
www.DataSheet.in
1 2007-10-19
1 page  
TC7MH257FK
AC Characteristics (Input: tr = tf = 3 ns)
Characteristics
Propagation delay time
(A, B-Y)
Symbol
tpLH
tpHL
Test Condition
⎯
VCC (V) CL (pF)
3.3 ± 0.3
15
50
5.0 ± 0.5
15
50
Propagation delay time
(SELECT-Y)
tpLH
tpHL
15
3.3 ± 0.3
50
⎯
15
5.0 ± 0.5
50
3-state output enable time
tpZL
tpZH
RL = 1 kΩ
3.3 ± 0.3
5.0 ± 0.5
15
50
15
50
3-state output disable time
tpLZ
tpHZ
RL = 1 kΩ
3.3 ± 0.3
5.0 ± 0.5
50
50
Input capacitance
Output capacitance
Power dissipation
capacitance
CIN
COUT
CPD
⎯
⎯
(Note)
Ta = 25°C
Min Typ. Max
⎯ 5.8 9.3
⎯ 8.3 12.8
⎯ 3.6 5.9
⎯ 5.1 7.9
⎯ 7.0 11.0
⎯ 9.5 14.5
⎯ 4.0 6.8
⎯ 5.5 8.8
⎯ 6.7 10.5
⎯ 9.2 14.0
⎯ 3.6 6.8
⎯ 5.1 8.8
⎯ 8.6 12.0
⎯ 5.7 7.9
⎯ 4 10
⎯6⎯
⎯ 23 ⎯
Ta = −40~85°C
Min Max
1.0 11.0
1.0 14.5
1.0 7.0
1.0 9.0
1.0 13.0
1.0 16.5
1.0 8.0
1.0 10.0
1.0 12.5
1.0 16.0
1.0 8.0
1.0 10.0
1.0 13.5
1.0 9.0
⎯ 10
⎯⎯
⎯⎯
Unit
ns
ns
ns
ns
pF
pF
pF
Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD･VCC･fIN + ICC/4 (per bit)
Noise Characteristics (Input: tr = tf = 3 ns)
Characteristics
Symbol
Test Condition
Quiet output maximum dynamic VOL
Quiet output minimum dynamic VOL
Minimum high level dynamic input voltage VIH
Maximum low level dynamic input voltage VIL
VOLP
VOLV
VIHD
VILD
CL = 50 pF
CL = 50 pF
CL = 50 pF
CL = 50 pF
VCC (V)
5.0
5.0
5.0
5.0
Ta = 25°C
Typ. Limit
0.3 0.8
−0.3 −0.8
⎯ 3.5
⎯ 1.5
Unit
V
V
V
V
Input Equivalent Circuit
Input
www.DataSheet.in
5 2007-10-19
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet TC7MH257FK.PDF ] | |
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