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PDF 42S16100 Data sheet ( Hoja de datos )

Número de pieza 42S16100
Descripción IS42S16100
Fabricantes Integrated Silicon Solution 
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IS42S16100
512K Words x 16 Bits x 2 Banks (16-MBIT)
SYNCHRONOUS DYNAMIC RAM
FEBRUARY 2008
FEATURES
• Clock frequency: 200, 166, 143 MHz
• Fully synchronous; all signals referenced to a
positive clock edge
• Two banks can be operated simultaneously and
independently
• Dual internal bank controlled by A11
(bank select)
• Single 3.3V power supply
• LVTTL interface
• Programmable burst length
– (1, 2, 4, 8, full page)
• Programmable burst sequence:
Sequential/Interleave
• 2048 refresh cycles every 32 ms
• Random column address every clock cycle
• Programmable CAS latency (2, 3 clocks)
• Burst read/write and burst read/single write
operations capability
• Burst termination by burst stop and
precharge command
• Byte controlled by LDQM and UDQM
• Packages 400-mil 50-pin TSOP-II and 60-ball
BGA
• Lead-free package option
• Available in Industrial Temperature
DESCRIPTION
ISSI’s 16Mb Synchronous DRAM IS42S16100 is
organized as a 524,288-word x 16-bit x 2-bank for
improved performance. The synchronous DRAMs
achieve high-speed data transfer using pipeline
architecture. All inputs and outputs signals refer to the
rising edge of the clock input.
PIN CONFIGURATIONS
50-Pin TSOP (Type II)
VDD
DQ0
DQ1
GNDQ
DQ2
DQ3
VDDQ
DQ4
DQ5
GNDQ
DQ6
DQ7
VDDQ
LDQM
WE
CAS
RAS
CS
A11
A10
A0
A1
A2
A3
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
50 GND
49 DQ15
48 IDQ14
47 GNDQ
46 DQ13
45 DQ12
44 VDDQ
43 DQ11
42 DQ10
41 GNDQ
40 DQ9
39 DQ8
38 VDDQ
37 NC
36 UDQM
35 CLK
34 CKE
33 NC
32 A9
31 A8
30 A7
29 A6
28 A5
27 A4
26 GND
PIN DESCRIPTIONS
A0-A11
Address Input
A0-A10
Row Address Input
A11
Bank Select Address
A0-A7
Column Address Input
DQ0 to DQ15 Data DQ
CLK
System Clock Input
CKE
Clock Enable
CS
Chip Select
RAS
Row Address Strobe Command
CAS
WE
LDQM
UDQM
VDD
GND
VDDQ
GNDQ
NC
Column Address Strobe Command
Write Enable
Lower Bye, Input/Output Mask
Upper Bye, Input/Output Mask
Power
Ground
Power Supply for DQ Pin
Ground for DQ Pin
No Connection
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the
latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. D
01/28/08
1

1 page




42S16100 pdf
IS42S16100
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Parameters
Vdd max
Maximum Supply Voltage
Vddq max
Maximum Supply Voltage for Output Buffer
Vin
Input Voltage
Vout
Output Voltage
Pd max
Allowable Power Dissipation
Ics Output Shorted Current
Topr
Operating Temperature
Com
Ind.
Tstg
Storage Temperature
Rating Unit
–1.0 to +4.6 V
–1.0 to +4.6 V
–1.0 to +4.6 V
–1.0 to +4.6 V
1 W
50 mA
0 to +70 °C
-40 to +85 °C
–55 to +150 °C
DC RECOMMENDED OPERATING CONDITIONS(2) (At Ta = 0 to +70°C)
Symbol
Vdd, Vddq
Vih
Vil
Parameter
Supply Voltage
Input High Voltage(3)
Input Low Voltage(4)
Min.
3.0
2.0
-0.3
Typ.
3.3
Max.
3.6
Vdd + 0.3
+0.8
Unit
V
V
V
CAPACITANCE CHARACTERISTICS(1,2) (At Ta = 0 to +25°C, VDD = VDDQ = 3.3 ± 0.3V, f = 1 MHz)
Symbol Parameter
Typ. Max. Unit
Cin1
Cin2
Input Capacitance: A0-A11
Input Capacitance: (CLK, CKE, CS, RAS, CAS, WE, LDQM, UDQM)
4 pF
4 pF
CI/O
Data Input/Output Capacitance: DQ0-DQ15
— 5 pF
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
reliability.
2. All voltages are referenced to GND.
3. Vih (max) = Vddq + 2.0V with a pulse width 3 ns.
Integrated Silicon Solution, Inc. — www.issi.com
Rev.  D
01/28/08
5

5 Page





42S16100 arduino
IS42S16100
COMMANDS (cont.)
Self-Refresh Command
CLK
CKE
CS
RAS
CAS
WE
A0-A9
A10
A11
Clock Suspend Command
CLK
CKE BANK(S) ACTIVE
CS
RAS
CAS
WE
A0-A9
NOP
A10
A11
NOP
NOP
NOP
Power Down Command
CLK
CKE ALL BANKS IDLE
CS
RAS
CAS
WE
A0-A9
NOP
A10
A11
NOP
NOP
NOP
Burst Stop Command
CLK
CKE HIGH
CS
RAS
CAS
WE
A0-A9
A10
A11
Integrated Silicon Solution, Inc. — www.issi.com
Rev.  D
01/28/08
11

11 Page







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