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PDF 8632E Data sheet ( Hoja de datos )

Número de pieza 8632E
Descripción MAX8632E
Fabricantes Maxim Integrated Products 
Logotipo Maxim Integrated Products Logotipo



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No Preview Available ! 8632E Hoja de datos, Descripción, Manual

19-3623; Rev 0; 3/05
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EVAALVUAAILTAIOBNLEKIT Integrated DDR Power-Supply Solution
for Desktops, Notebooks, and Graphic Cards
General Description
The MAX8632 integrates a synchronous-buck PWM con-
troller to generate VDDQ, a sourcing and sinking LDO lin-
ear regulator to generate VTT, and a 10mA reference
output buffer to generate VTTR. The buck controller drives
two external n-channel MOSFETs to generate output volt-
ages down to 0.7V from a 2V to 28V input with output cur-
rents up to 15A. The LDO can sink or source up to 1.5A
continuous and 3A peak current. Both the LDO output
and the 10mA reference buffer output can be made to
track the REFIN voltage. These features make the
MAX8632 ideally suited for DDR memory applications in
desktops, notebooks, and graphic cards.
The PWM controller in the MAX8632 utilizes Maxim’s
proprietary Quick-PWM™ architecture with programma-
ble switching frequencies of up to 600kHz. This control
scheme handles wide input/output voltage ratios with
ease and provides 100ns response to load transients
while maintaining high efficiency and a relatively con-
stant switching frequency. The MAX8632 offers fully pro-
grammable UVP/OVP and skip-mode options ideal in
portable applications. Skip mode allows for improved
efficiency at lighter loads.
The VTT and VTTR outputs track to within 1% of VREFIN / 2.
The high bandwidth of this LDO regulator allows excel-
lent transient response without the need for bulk capac-
itors, thus reducing cost and size.
The buck controller and LDO regulators are provided with
independent current limits. Adjustable lossless foldback
current limit for the buck regulator is achieved by monitor-
ing the drain-to-source voltage drop of the low-side
MOSFET. Additionally, overvoltage and undervoltage pro-
tection mechanisms are built in. Once the overcurrent
condition is removed, the regulator is allowed to enter
soft-start again. This helps minimize power dissipation
during a short-circuit condition. The MAX8632 allows flex-
ible sequencing and standby power management using
the SHDN and STBY inputs, which support all DDR
operating states.
The MAX8632 is available in a small 5mm × 5mm, 28-
pin thin QFN package.
Applications
DDR I and DDR II Memory Power Supplies
Desktop Computers
Notebooks and Desknotes
Graphic Cards
Game Consoles
RAID
Networking
Features
Buck Controller
Quick-PWM with 100ns Load-Step Response
Up to 95% Efficiency
2V to 28V Input Voltage Range
1.8V/2.5V Fixed or 0.7V to 5.5V Adjustable Output
Up to 600kHz Selectable Switching Frequency
Programmable Current Limit with Foldback
Capability
1.7ms Digital Soft-Start
Independent Shutdown and Standby Controls
Overvoltage-/Undervoltage-Protection Option
Power-Good Window Comparator
LDO Section
Fully Integrated VTT and VTTR Capability
VTT Has ±3A Sourcing/Sinking Capability
Only 20µF Ceramic Capacitance Required for VTT
VTT and VTTR Outputs Track VREFIN / 2
All-Ceramic Output-Capacitor Designs
1.0V to 2.8V Input Voltage Range
Power-Good Window Comparator
Ordering Information
PART
TEMP RANGE PIN-PACKAGE
MAX8632ETI+
-40°C to +85°C 28 Thin QFN 5mm × 5mm
+Denotes lead-free packaging.
Pin Configuration
TOP VIEW
VDD 22
PGND1 23
GND 24
SKIP 25
AVDD 26
SHDN 27
TPO 28
21 20 19 18 17 16 15
MAX8632
14 REFIN
13 VTTI
12 VTT
11 PGND2
10 VTTR
9 VTTS
8 SS
1 23 4 56 7
5mm x 5mm THIN QFN
Typical Operating Circuit appears at end of data sheet.
Quick-PWM is a trademark of Maxim Integrated Products, Inc.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

1 page




8632E pdf
www.DataSheet4U.com
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
ELECTRICAL CHARACTERISTICS (continued)
(VIN = +15V, VDD = AVDD = V SHDN = STBY = VBST = VILIM = 5V, VOUT = VREFIN = VVTTI = 2.5V, UVP/OVP = TP0 = FB = SKIP
= GND, PGND1 = PGND2 = LX = GND, TON = OPEN, VVTTS = VVTT, TA = -40°C to +85°C, unless otherwise noted. Typical values
are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
LINEAR REGULATORS (VTTR AND VTT)
VTTI Input Voltage Range
VTTI Supply Current
VTTI Shutdown Current
VVTTI
IVTTI
IVTT = IVTTR = 0
SHDN = GND
1 2.8 V
<0.1
1
mA
10 µA
REFIN Input Impedance
VREFIN = 2.5V
12 20 30 k
REFIN Range
VREFIN
1 2.8 V
VTT, VTTR UVLO Threshold
(Measured at OUT)
0.01 0.1 0.20
V
Soft-Start Charge Current
VTT Internal MOSFET High-Side
On-Resistance
ISS VSS = 0
IVTT = -100mA, VVTTI = 1.5V,
AVDD = 4.5V
4 µA
0.3
VTT Internal MOSFET Low-Side
On-Resistance
IVTT = 100mA, AVDD = 4.5V
0.3
VTT Output Accuracy
(Referred to VREFIN / 2)
VTT Load Regulation
VTT Current Limit
VTTS Input Current
VTTR Output Error
(Referred to VREFIN / 2)
VTTR Current Limit
VTTR Bias Current
IVTTS
VREFIN = 1.5V or 2.5V, IVTT = 1mA
VREFIN = 2.5V, IVTT = 0 to ±1.5A
VREFIN = 1.5V, IVTT = 0 to ±1A
VTT = 0 or VTTI
VVTTS = 1.5V, VTT open
VREFIN = 1.5V or 2.5V, IVTTR = 0
VVTTR = 0 or VVTTI
VREFIN = VVTTI = 0
-1 +1 %
1.3
%
1.3
±3 ±5 ±6.5 A
0.1 1 µA
-1 +1 %
±18 ±32 ±50
0.6 4
mA
µA
Note 1: Specifications to -40°C are guaranteed by design, not production tested.
Note 2: When the inductor is in continuous conduction, the output voltage has a DC regulation level higher than the error-compara-
tor threshold by 50% of the ripple. In discontinuous conduction, the output voltage has a DC regulation level higher than the
trip level by approximately 1.5% due to slope compensation.
Note 3: On-time and off-time specifications are measured from 50% point to 50% point at the DH pin with LX = GND, VBST = 5V,
and a 250pF capacitor connected from DH to LX. Actual in-circuit times may differ due to MOSFET switching speeds.
_______________________________________________________________________________________ 5

5 Page





8632E arduino
www.DataSheet4U.com
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
IN
tOFF
TRIG MAX8632
Q ONE-SHOT
TON
ON-TIME
COMPUTE
OUT
tON
TRIG
ONE-SHOT
Q
S
Q
R
BST
DH
LX
INTREF
1.16 x INTREF
S
Q
R
VDD
DL
PGND
OVP/UVP
SHDN
BUCK ON/OFF
QUAD LEVEL
DECODE
OVP/UVP
LATCH
TP0
STBY
SHUTDOWN BIAS ON/OFF
DECODER
VTT ON/OFF VTTR ON/OFF
0.7 x INTREF
INTREF + 10%
20ms
TIMER
INTREF - 10%
POK1
N
FB
1.0V
LX
ZERO CROSSING
VDD - 1V
LX
VOUT = 1.8V
VOUT = 2.5V
DISCHARGE
LOGIC
FB
DECODE
INTREF
2V
REFERENCE
N
POK2
REFIN / 2 - 10%
REFIN / 2 + 10%
0.1V OUT
POWER-DOWN
N
CURRENT
VTT ILIM
LIMITS
10k
10k
REFIN / 2
VDD
N
VDD
N
VTTI
REFIN / 2 - 10%
REFIN / 2 + 10%
PGND2
ILIM
SKIP
OUT
AVDD
GND
REF
VTTS
REFIN
VTTI
VTT
PGND2
VTTR
SS
Figure 1. Functional Diagram
______________________________________________________________________________________ 11

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