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PDF NCP1532 Data sheet ( Hoja de datos )
| Número de pieza | NCP1532 | |
| Descripción | Dual Output Step-Down Converter 2.25 MHz High-Efficiency = Out | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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NCP1532
Dual Output Step-Down
Converter 2.25 MHz
High-Efficiency, Out of
Phase Operation, Low
Quiescent Current, Source
up to 1.6 A
The NCP1532 dual step down DCDC converter is a monolithic
integrated circuit dedicated to supply core and I/O voltages of new
multimedia design in portable applications powered from 1−cell
Li−ion or 3 cell Alkaline / NiCd / NiMH batteries.
Both channels are externally adjustable from 0.9 V to 3.3 V and can
source totally up to 1.6 A, 1.0 A maximum per channel. Converters are
running at 2.25 MHz switching frequency which reduces component
size by allowing the use of small inductor (down to 1 mH) and
capacitors and operates 180° out of phase to reduce large amount of
current demand on the battery. Automatic switching PWM/PFM mode
and synchronous rectification offer improved system efficiency. The
device can also operate into fixed frequency PWM mode for low noise
applications where low ripple and good load transients are required.
Additional features include integrated soft−start, cycle−by−cycle
current limit and thermal shutdown protection. The device can also be
synchronized to an external clock signal in the range of 2.25 MHz.
The NCP1532 is available in a space saving, ultra low profile
3x3 x 0.55 mm 10 pin mDFN package.
Features
• Up to 97% Efficiency
• 50 mA Quiescent Current
• Synchronous Rectification for Higher Efficiency
• 2.25 MHz Switching Frequency, 180° Out of Phase
• Sources up to 1.6 A, 1.0 A Maximum per Channel
• Adjustable Output Voltage from 0.9 V to 3.3 V
• Mode Selection Pin: Eco Mode or Low Noise Mode
• 2.7 V to 5.5 V Input Voltage Range
• Thermal Limit Protection
• Short Circuit Protection
• All pins are fully ESD Protected
• This is a Pb−Free Device
Typical Applications
• Cellular Phones, Smart Phones and PDAs
• Digital Still Cameras
• MP3 Players and Portable Audio Systems
• Wireless and DSL Modems
• Portable Equipment
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UDFN10
MU SUFFIX
CASE 506AT
MARKING
DIAGRAM
1532
AA
AaLYWG
G
Aa = Assembly Location
(may be 1 or 2 characters)
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTION
FB1
EN1
VIN
SW1
GND
1 10
29
38
47
56
(Top View)
UDFN10
FB2
EN2
POR
SW2
MODE/
SYNC
ORDERING INFORMATION
Device
Package
Shipping†
NCP1532MUAATXG UDFN10
(Pb−Free)
3000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2010
June, 2010 − Rev. 5
1
Publication Order Number:
NCP1532/D
1 page  
NCP1532
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ELECTRICAL CHARACTERISTICS
(Typical values are referenced to TA = +25°C, Minimum and Maximum values are referenced −40°C to +85°C ambient temperature,
unless otherwise noted, operating conditions VIN = 3.6 V, VOUT1 = VOUT2 = 1.2 V, unless otherwise noted).
Rating
Conditions
Symbol
Min
Typ
Max
Unit
INPUT VOLTAGE
Input Voltage Range
Quiescent Current,
No Switching, No Load
No Load
MODE/SYNC = GND
VIN 2.7 − 5.5
V
IQ mA
− 50 70
− 60 −
Standby Current
Under Voltage Lockout
Under Voltage Hysteresis
ANALOG AND DIGITAL PIN
EN1 = EN2 = GND
VIN Falling
ISTB
− 0.3 1.0
VUVLO 2.2 2.4 2.55
VUVLOH − 100 −
mA
V
mV
Positive Going Input High Voltage Threshold
Negative Going Input High Voltage Threshold
Digital Threshold Hysteresis
External Synchronization (Note 11)
Minimum
Maximum
EN1, EN2, MODE/SYNC
EN1, EN2, MODE/SYNC
EN1, EN2, MODE/SYNC
MODE/SYNC
VIH 1.2 − −
VIL − − 0.4
VHYS
− 100 −
FSYNC
− 1.8 −
− 3.0 −
V
V
mV
MHz
POWER ON RESET (Note 9)
Power On Reset Threshold
Power On Reset Hysteresis
Power On Reset Delay (See Page 12)
OUTPUT PERFORMANCES
VOUT Falling
VPORT
VPORH
TPOR
− 89% −
− 3% −
− 116 −
V
V
ms
Feedback Voltage Threshold
Minimum Output Voltage
Maximum Output Voltage
Output Voltage Accuracy (Note 10)
FB1, FB2
Room Temperature
Overtemperature Range
VFB
VOUT
VOUT
DVOUT
−
−
−
−
−3%
0.6
0.9
3.3
$1%
$2%
−
−
−
−
+3%
V
V
V
%
Output Voltage load regulation
NCP1532MUAATXG
Overtemperature
Load = 100 mA to 600 mA
VLOADR
− −0.6 −
%
Load transient response
Rise/Falltime 1 ms
10 mA to 100 mA load step
VLOADT
−
40
−
(PFM to PWM mode)
200 mA to 600 mA load step
− 85 −
(PWM to PWM mode)
mV
Output Voltage Line Regulation
Load = 100 mA
VIN = 2.7 V to 5.5 V
VLINER
− 0.05 −
%
Line Transient Response
Load = 100 mA
3.6 V to 3.2 V Line Step
(Falltime = 50 ms)
VLINET − 6.0 − mVPP
Output Voltage Ripple
Soft−Start Time
IOUT = 0 mA
IOUT = 300 mA
VRIPPLE
−
8.0
−
mVPP
− 3.0 −
Time from EN to 90% of Output
Voltage
tSTART
− 230 350
ms
Switching Frequency
Duty Cycle
FSW 1.8 2.25 2.7 MHz
D − − 100 %
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5
5 Page 
NCP1532
DC/DC OPERATION DESCRIPTION
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Detailed Description
The NCP1532 uses a constant frequency, current mode
step−down architecture. Both the main (P−channel
MOSFET) and synchronous (N−channel MOSFET)
switches are internal.
The output voltages are set by the external resistor divider
in the range of 0.9 V to 3.3 V and can source 1600 mA
totally depending on device option.
The NCP1532 works with two modes of operation;
PWM/PFM depending on the current required. In PWM
mode, the device can supply voltage with a tolerance of
$3% and 90% efficiency or better. Lighter load currents
cause the device to automatically switch into PFM mode to
reduce current consumption (Iq = 50 mA) and extended
battery life. For low noise applications, by pulling the
MODE/SYNC Pin to VIN, the device operates in PWM
mode only.
Additional features include soft−start, undervoltage
protection, current overload protection and thermal
shutdown protection. As shown on Figure 1, only six
external components are required for implementation. The
part uses an internal reference voltage of 0.6 V. It is
recommended to keep NCP1532 in shutdown until the input
voltage is 2.7 V or higher. To reduce power demand on the
battery, the two DC−DC operates out of phase. This reduces
significantly spikes on Vin line. Using external
synchronization, the two channels are working on same
signal phase. See MODE/SYNC section for more
information.
PWM Operating Mode
In this mode, the output voltage of the device is regulated
by modulating the on−time pulse width of the main switch
Q1 at a fixed 2.25 MHz frequency.
The switching of the PMOS Q1 is controlled by a flip−flop
driven by the internal oscillator and a comparator that
compares the error signal from an error amplifier with the
sum of the sensed current signal and compensation ramp.
The driver switches ON and OFF the upper side transistor
(Q1) and switches the lower side transistor in either ON state
or in current source mode.
At the beginning of each cycle, the main switch Q1 is
turned ON by the rising edge of the internal oscillator clock.
The inductor current ramps up until the sum of the current
sense signal and compensation ramp becomes higher than
the error amplifier’s voltage. Once this has occurred, the
PWM comparator resets the flip−flop, Q1 is turned OFF
while the synchronous switch Q2 is turned ON. Q2 replaces
the external Schottky diode to reduce the conduction loss
and improve the efficiency. To avoid overall power loss, a
certain amount of dead time is introduced to ensure Q1 is
completely turned OFF before Q2 is being turned ON.
Figure 22. PWM Switching Waveforms
VIN = 3.6 V, VOUT1 = VOUT2 = 1.2 V,
IOUT1 = IOUT2 = 100 mA
PFM Operating Mode
Under light load conditions, the NCP1532 enters in low
current PFM mode of operation to reduce power
consumption. The output regulation is implemented by
pulse frequency modulation. If the output voltage drops
below the threshold of PFM comparator a new cycle will be
initiated by the PFM comparator to turn on the switch Q1.
Q1 remains ON during the minimum on time of the structure
while Q2 is in its current source mode. The peak inductor
current depends upon the drop between input and output
voltage. After a short dead time delay where Q1 is switched
OFF, Q2 is turned in its ON state. The negative current
detector will detect when the inductor current drops below
zero and sends the signal to turn Q2 in current source mode
to prevent a too large deregulation of the output voltage.
When the output voltage falls below the threshold of the
PFM comparator, a new cycle starts immediately.
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11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet NCP1532.PDF ] | |
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