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PDF BD8918FV Data sheet ( Hoja de datos )

Número de pieza BD8918FV
Descripción IC Care Interface ICs
Fabricantes ROHM Semiconductor 
Logotipo ROHM Semiconductor Logotipo



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No Preview Available ! BD8918FV Hoja de datos, Descripción, Manual

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IC Card Interface ICs
IC Card Interface ICs
with Built-in Low Noise LDO Regulator
BD8918F,BD8918FV,BD8919F,BD8919FV
No.09056EDT01
Overview
This is an interface IC for a 5V smart card.
It works as a bidirectional signal buffer between a smart card and a controller. Also, it supplies 5V power to a smart card.
With an electrostatic breakdown voltage of more than HBM; ±6000V, it protects the card contact pins.
Features
1) 1 half duplex bidirectional buffers
2) Protection against short-circuit for all the card contact pins
3) 5V power source for the card (VCC)
4) Over-current protection for card power source
5) Built-in thermal shutdown circuit
6) Built-in supply voltage detector
7) Automatic activation/deactivation sequence function for card contact pin
Activation sequence: driven by a signal from controller (CMDVCCB)
Deactivation sequence: driven by a signal from controller (CMDVCCB) and fault detection (card removal, short
circuit of card power, IC overheat detection, VDD or VDDP drop)
8) Card contact pin ESD voltage ±6000V
9) Recommend frequency of crystal oscillator: 8MHz (BD8918F/FV), 16MHz (BD8919F/FV)
10) Programmable for card clock division of output signal: 1/1 and 1/2(BD8918F/FV), 1/2 and 1/4(BD8919F/FV).
11) RST output control by RSTIN input signal (positive output)
12) One multiplexed card status output by OFFB signal
Applications
Interface for CLASS A smart cards
Interface for B-CAS cards
Line up matrix
Part No
BD8918F
BD8918FV
BD8919F
BD8919FV
Card clock
Ratio of dividing frequency
1/1f, 1/2f
1/2f, 1/4f
Package
SOP16
SSOP-B16
SOP16
SSOP-B16
www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
1/15
2010.4 - Rev.D

1 page




BD8918FV pdf
BD8918F,BD8918FV,BD8919F,BD8919FV
Pin Function Diagram
Pin Pin
No. Name
Pin function Diagram
VDD
VDD
1 XTAL1
1
2
2 XTAL2
Technical Note
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Pin Pin
No. Name
Pin function Diagram
VDDP VREG
VREG
8 IO_C 8
3 VDD
3
VREG
VDDP
9 RST
9
4 CLKSEL
4,5
5 RSTIN
VDD
VDD
VDD
6 IO_U 5
VREG VDDP
10 CLK
10
11 VCC
VDDP
VDDP
11
7 CGND
www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
5/15
2010.4 - Rev.D

5 Page





BD8918FV arduino
BD8918F,BD8918FV,BD8919F,BD8919FV
Technical Note
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6) Card clock supply
Card clock is supplied from the CLK pin dividing the input frequency of XTAL1 pin with the CLKSEL pin setting. The clock
division switching time is within the 8 clocks of the XTAL1 signal.
The input signal to the XTAL1 pin is made by a crystal oscillator (BD8918F/FV:8Hz, BD8919F/FV:16MHz) between the
XTAL1 pin and XTAL2 pin or external pulse signal.
When a crystal oscillator is used, the voltage between XTAL1 and XTAL2 may decrease to become close to “-1V”, which
is not a problem.
When an external pulse signal is applied to the XTAL1 pin (except for signal input by crystal oscillation), the duty of the
XTAL1 pin should be 48% - 52% and the transition time of the XTAL1 pin should be within 5% of the signal cycle to
ensure the duty factor of 45% - 55% at the CLK pin.
Table 2 Clock frequency selection (fXTAL: Frequency at XTAL1)
CLKSEL
fclk
BD8918F/FV
1
0
f XTAL
f XTAL
2
BD8919F/FV
CLKSEL
1
0
fclk
f XTAL
2
f XTAL
4
7) RSTIN input, RST output
The RSTIN input becomes effective after the CMDVCCB signal input turns to L from H, activation sequence is initiated
and approximately 48s after I/O TRANS turns ON. The RST output is released in approximately 472sec (max.
481sec) after the CMDVCCB signal turns from H to L to output a signal based on the RSTIN input.
8) Fault detection
When the following fault state is detected, the circuit enters the wait mode after it generates an internal alarm signal and
is deactivated.
If a card is not present, it remains in the wait mode.
• When the VCC pin becomes less than 1.6V, or is loaded high current (TYP: 140mA)
• When VDDP voltage is less than the threshold voltage (detected by supply voltage detector)
• When a high temperature is detected by the thermal shutdown circuit
• When the card is removed during operation or the card is not present from the beginning (PRES=L)
9) OFFB output
The OFFB output pin indicates the IC is ready to operate. It is pulled up to VDD with a 20kresistor.
When the IC is in the ready state, OFFB is High.
After activation, the OFFB outputs OFF state (Lo) when a fault state is detected.
When a card is present and CMDVCCB becomes High, the internal alarm is released and the OFFB output becomes
High.
PRES
OFFB
CMDVCCB
VCC
tdebounce
tdebounce
tdebounce = typ 8ms
Shutdown bycard removal
Shutdownbyshort-circuitingof pins
Fig. 6 OFFB, CMDVCCB, PRES, VCC operation
www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
11/15
2010.4 - Rev.D

11 Page







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