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PDF NJU26209 Data sheet ( Hoja de datos )
| Número de pieza | NJU26209 | |
| Descripción | DAEP Decoder | |
| Fabricantes | New Japan Radio | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de NJU26209 (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
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NJU26209www.DataSheet4U.com
DAEP Decoder
General Description
The NJU26209 is a digital signal processor that provides the function of DAEP (Dolby
Automotive Entertainment Program).
A location of sound image forward is possible without a center speaker by all seats in the
car.
The applications of NJU26209 are suitable for Car Audio, Car Navigation system and other
audio products.
■Package
Features
-Software
DAEP (Dolby Automotive Entertainment Program)
Pro Logic II
Automotive (Advanced Surround Fader, Center Image Control)
Bass Management
Time Alignment
Master Volume
Input Trim
Channel Trim
NJU26209V
-Hardware
24bit Fixed-point Digital Signal Processing
Maximum Clock Frequency : 12.288MHz(Standard), built-in PLL Circuit
Digital Audio Interface
: 4 Input ports / 4 Output ports
Digital Audio Format
: I2S 24bit, left-justified, right-justified, BCK : 32fs/64fs
Master / Slave Mode
Microcomputer Interface
I2C Bus (Standard-mode/100kbps, Fast-mode/400kbps)
4-Wire Serial Bus (4-Wire: Clock, Enable, Input data, Output data)
Operating Voltage
Input Terminal
: VDD = VDDPLL = 1.8V
: VDDIO = 3.3V
: +5.0V Input tolerant
Package
: SSOP44 (Pb-Free)
* The detail hardware specification of the NJU26209 is described in the “ NJU26200 Series Hardware Data Sheet”.
Ver.2008-12-04
-1-
1 page  
NJU26209www.DataSheet4U.com
Pin Description
Table 1 Pin Description
Pin No.
Symbol
1 SDI3
2 SDI2
3 SDI1
4 SDI0
5 LRI
6 VDDIO
7 BCKI
8 VSS
9 VDD
10 TEST *
11 MUTEb *
12 WDC *
13 PROC *
14 VSSIO
15 VDDIO
16 SEL
17 VDDPLL
18 VSSPLL
19 VSS
20 VDD
21 CLKOUT
22 CLK
23 VSSIO
24 VDDIO
25 RESETb
26 TEST
27 TEST
28 TEST
29 AD1/SDIN
30 AD2/SSb
31 SCL/SCK
32 SDA/SDOUT
33 VDDIO
34 MCK
35 BCKO
36 LRO
37 SDO3
38 SDO2
39 SDO1
40 SDO0
41 VDDIO
42 VSSIO
43 VSS
44 VDD
I/O Function
I Audio Data Input ch.3 (LS/RS)
I Audio Data Input ch.2 (C/SW)
I Audio Data Input ch.1 (L/R)
I Audio Data Input ch.0 (L/R)
I LR Clock Input
- I/O Power Supply +3.3V
I Bit Clock Input
- DSP Core Power Supply GND
- DSP Core Power Supply +1.8V
I
for test
connect with VSSIO through 3.3-ohm resistance.
I Master Volume Status after reset ‘1’: 0dB, ‘0’: Mute
OD Watchdog Clock output pin (Open drain output)
I
Signal Processing after reset ‘1’: Normal Processing, ‘0’: Waiting for a
Command without Processing
- I/O Power Supply GND
- I/O Power Supply +3.3V
I Host Interface Selection ‘1’: Serial Interface, ‘0’: I2C bus
- PLL Power Supply +1.8V
- PLL Power Supply GND
- DSP Core Power Supply GND
- DSP Core Power Supply +1.8V
O OSC Clock Output
I OSC Clock Input (12.288MHz)
- I/O Power Supply GND
- I/O Power Supply +3.3V
I Reset (RESETb=’0’: DSP Reset)
I for test (connect to VDDIO)
I for test (connect to VSSIO)
I for test (connect to VSSIO)
I I2C Address (I2C mode) / Serial In (4-wire serial mode)
I I2C Address (I2C mode) / Serial enable (4-wire serial mode)
I I2C SCL (I2C mode) / Serial clock (4-wire serial mode)
I/O I2C SDA (I2C mode) / Serial Out (4-wire serial mode)
- I/O Power Supply +3.3V
O A/D, D/A clock output (buffer output of a CLK pin)
O Bit Clock Output
O LR Clock Output
O Audio Data Output ch.3 (LM/RM)
O Audio Data Output ch.2 (C/SW)
O Audio Data Output ch.1 (L/R)
O Audio Data Output ch.0 (LS/RS)
- I/O Power Supply +3.3V
- I/O Power Supply GND
- DSP Core Power Supply GND
- DSP Core Power Supply +1.8V
Note : I : Input
O : Output
OD : Open Drain Output
I/O : Bi-directional
Pins symbol with * : Connect with VDDIO or VSSIO through 3.3kΩ resistance
Ver.2008-12-04
-5-
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet NJU26209.PDF ] | |
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